PIC18F2450 Datasheet, PDF (238/320 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2450/4450
MOVFF
Move f to f
Syntax:
Operands:
Operation:
Status Affected:
MOVFF f_s,f_d
0 ≤ f_s ≤ 4095
0 ≤ f_d ≤ 4095
(f_s) → f_d
None
Encoding:
1st word (source)
2nd word (destin.)
Description:
1100
1111
ffff
ffff
ffff ffff_s
ffff ffff_d
The contents of source register ‘f_s’ are
moved to destination register ‘f_d’.
Location of source ‘f_s’ can be anywhere
in the 4096-byte data space (000h to
FFFh) and location of destination ‘f_d’
can also be anywhere from 000h to
FFFh.
Either source or destination can be W
(a useful special situation).
MOVFF is particularly useful for
transferring a data memory location to a
peripheral register (such as the transmit
buffer or an I/O port).
The MOVFF instruction cannot use the
PCL, TOSU, TOSH or TOSL as the
destination register.
Words:
2
Cycles:
2
Q Cycle Activity:
Q1
Decode
Decode
Q2
Read
register ‘f’
(src)
No
operation
No dummy
read
Q3
Process
Data
No
operation
Q4
No
operation
Write
register ‘f’
(dest)
Example:
MOVFF REG1, REG2
Before Instruction
REG1
REG2
= 33h
= 11h
After Instruction
REG1
REG2
= 33h
= 33h
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Move Literal to Low Nibble in BSR
MOVLW k
0 ≤ k ≤ 255
k → BSR
None
0000 0001 kkkk kkkk
The eight-bit literal ‘k’ is loaded into the
Bank Select Register (BSR). The value
of BSR<7:4> always remains ‘0’
regardless of the value of k₇:k₄.
1
1
Q2
Read
literal ‘k’
Q3
Process
Data
Q4
Write literal
‘k’ to BSR
Example:
MOVLB
5
Before Instruction
BSR Register = 02h
After Instruction
BSR Register = 05h
DS39760A-page 236
Advance Information
© 2006 Microchip Technology Inc.