PIC18F2450 Datasheet, PDF (140/320 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2450/4450
When UOWN is set, the user can no longer depend on
the values that were written to the BDs. From this point,
the SIE updates the BDs as necessary, overwriting the
original BD values. The BDnSTAT register is updated
by the SIE with the token PID and the transfer count,
BDnCNT, is updated.
The BDnSTAT byte of the BDT should always be the
last byte updated when preparing to arm an endpoint.
The SIE will clear the UOWN bit when a transaction
has completed. The only exception to this is when KEN
is enabled and/or BSTALL is enabled.
No hardware mechanism exists to block access when
the UOWN bit is set. Thus, unexpected behavior can
occur if the microcontroller attempts to modify memory
when the SIE owns it. Similarly, reading such memory
may produce inaccurate data until the USB peripheral
returns ownership to the microcontroller.
14.4.1.2 BDnSTAT Register (CPU Mode)
When UOWN = 0, the microcontroller core owns the
BD. At this point, the other seven bits of the register
take on control functions.
The Data Toggle Sync Enable bit, DTSEN
(BDnSTAT<3>), controls data toggle parity checking.
Setting DTSEN enables data toggle synchronization by
the SIE. When enabled, it checks the data packet’s
parity against the value of DTS (BDnSTAT<6>). If a
packet arrives with an incorrect synchronization, the
data will essentially be ignored. It will not be written to
the USB RAM and the USB transfer complete interrupt
flag will not be set. The SIE will send an ACK token
back to the host to Acknowledge receipt, however. The
effects of the DTSEN bit on the SIE are summarized in
Table 14-3.
The Buffer Stall bit, BSTALL (BDnSTAT<2>), provides
support for control transfers, usually one-time stalls on
Endpoint 0. It also provides support for the
SET_FEATURE/CLEAR_FEATURE commands speci-
fied in Chapter 9 of the USB specification; typically,
continuous STALLs to any endpoint other than the
default control endpoint.
The BSTALL bit enables buffer stalls. Setting BSTALL
causes the SIE to return a STALL token to the host if a
received token would use the BD in that location. The
EPSTALL bit in the corresponding UEPn control
register is set and a STALL interrupt is generated when
a STALL is issued to the host. The UOWN bit remains
set and the BDs are not changed unless a SETUP
token is received. In this case, the STALL condition is
cleared and the ownership of the BD is returned to the
microcontroller core.
The BD9:BD8 bits (BDnSTAT<1:0>) store the two most
significant digits of the SIE byte count; the lower 8 digits
are stored in the corresponding BDnCNT register. See
Section 14.4.2 “BD Byte Count” for more
information.
TABLE 14-3: EFFECT OF DTSEN BIT ON ODD/EVEN (DATA0/DATA1) PACKET RECEPTION
OUT Packet
from Host
BDnSTAT Settings
DTSEN
DTS
Device Response after Receiving Packet
Handshake UOWN TRNIF BDnSTAT and USTAT Status
DATA0
1
DATA1
1
DATA0
1
DATA1
1
Either
0
Either, with error
x
Legend: x = don’t care
0
ACK
0
1
0
ACK
1
0
1
ACK
0
1
1
ACK
1
0
x
ACK
0
1
x
NAK
1
0
Updated
Not Updated
Updated
Not Updated
Updated
Not Updated
DS39760A-page 138
Advance Information
© 2006 Microchip Technology Inc.