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PIC18F2450 Datasheet, PDF (51/320 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology
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PIC18F2450/4450
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
TOSU
TOSH
TOSL
STKPTR
2450
2450
2450
2450
4450
4450
4450
4450
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
uu-0 0000
---0 uuuu(1)
uuuu uuuu(1)
uuuu uuuu(1)
uu-u uuuu(1)
PCLATU
2450
4450
---0 0000
---0 0000
---u uuuu
PCLATH
PCL
2450
2450
4450
4450
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
PC + 2(3)
TBLPTRU
2450
4450
--00 0000
--00 0000
--uu uuuu
TBLPTRH
2450
4450
0000 0000
0000 0000
uuuu uuuu
TBLPTRL
2450
4450
0000 0000
0000 0000
uuuu uuuu
TABLAT
2450
4450
0000 0000
0000 0000
uuuu uuuu
PRODH
2450
4450
xxxx xxxx
uuuu uuuu
uuuu uuuu
PRODL
INTCON
INTCON2
INTCON3
2450
2450
2450
2450
4450
4450
4450
4450
xxxx xxxx
0000 000x
1111 -1-1
11-0 0-00
uuuu uuuu
0000 000u
1111 -1-1
11-0 0-00
uuuu uuuu
uuuu uuuu(2)
uuuu -u-u(2)
uu-u u-uu(2)
INDF0
2450
4450
N/A
N/A
N/A
POSTINC0
2450
4450
N/A
N/A
N/A
POSTDEC0
2450
4450
N/A
N/A
N/A
PREINC0
2450
4450
N/A
N/A
N/A
PLUSW0
2450
4450
N/A
N/A
N/A
FSR0H
2450
4450
---- 0000
---- 0000
---- uuuu
FSR0L
2450
4450
xxxx xxxx
uuuu uuuu
uuuu uuuu
WREG
2450
4450
xxxx xxxx
uuuu uuuu
uuuu uuuu
INDF1
2450
4450
N/A
N/A
N/A
POSTINC1
2450
4450
N/A
N/A
N/A
POSTDEC1
2450
4450
N/A
N/A
N/A
PREINC1
2450
4450
N/A
N/A
N/A
PLUSW1
2450
4450
N/A
N/A
N/A
FSR1H
2450
4450
---- 0000
---- 0000
---- uuuu
FSR1L
2450
4450
xxxx xxxx
uuuu uuuu
uuuu uuuu
BSR
2450
4450
---- 0000
---- 0000
---- uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1:
2:
3:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
4: See Table 4-3 for Reset value for specific condition.
5: PORTA<6>, LATA<6> and TRISA<6> are enabled depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read ‘0’.
© 2006 Microchip Technology Inc.
Advance Information
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