MAX11410 Datasheet, PDF (86/95 Pages) Maxim Integrated Products – 24-Bit Multi-Channel Low-Power

MAX11410
BITFIELD
TUR_IE_6
BITS
14
TUR_IE_5
13
TUR_IE_4
12
TUR_IE_3
11
TUR_IE_2
10
TUR_IE_1
9
TUR_IE_0
8
SYSGOR_IE
7
DATA_
RDY_IE
4
WAIT_
DONE_IE
3
CAL_RDY_IE
2
SEQ_
RDY_IE
1
CONV_
RDY_IE
0
16-bit Sequencer Registers
ADDRESS
NAME
SEQUENCER REGISTERS
0x3A
µC 0[15:8]
µC 0[7:0]
0x3B
0x3C
µC 1[15:8]
µC 1[7:0]
µC 2[15:8]
µC 2[7:0]
0x3D
µC 3[15:8]
µC 3[7:0]
0x3E
µC 4[15:8]
µC 4[7:0]
0x3F
µC 5[15:8]
µC 5[7:0]
DESCRIPTION
MSB
—
—
—
—
—
—
24-Bit Multi-Channel Low-Power
1.9ksps Delta-Sigma ADC with PGA
DECODE
0: TUR_6 does not affect INT state.
1: INT asserts when TUR_6 = 1.
0: TUR_5 does not affect INT state.
1: INT asserts when TUR_5 = 1.
0: TUR_4 does not affect INT state.
1: INT asserts when TUR_4 = 1.
0: TUR_3 does not affect INT state.
1: INT asserts when TUR_3 = 1.
0: TUR_2 does not affect INT state.
1: INT asserts when TUR_2 = 1.
0: TUR_1 does not affect INT state.
1: INT asserts when TUR_1 = 1.
0: TUR_0 does not affect INT state.
1: INT asserts when TUR_0 = 1.
0: SYSGOR does not affect INT state.
1: INT asserts when SYSGOR = 1.
0: DATA_RDY does not affect INT state.
1: INT asserts when DATA_RDY = 1.
0: WAIT_DONE does not affect INT state.
1: INT asserts when WAIT_DONE = 1.
0: CAL_RDY does not affect INT state.
1: INT asserts when CAL_RDY = 1.
0: SEQ_RDY does not affect INT state.
1: INT asserts when SEQ_RDY = 1.
0: CONV_RDY does not affect INT state.
1: INT asserts when CONV_RDY = 1.
REG_ADDR[6:0]
REG_DATA[7:0]
REG_ADDR[6:0]
REG_DATA[7:0]
REG_ADDR[6:0]
REG_DATA[7:0]
REG_ADDR[6:0]
REG_DATA[7:0]
REG_ADDR[6:0]
REG_DATA[7:0]
REG_ADDR[6:0]
REG_DATA[7:0]
LSB
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