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MAX11410 Datasheet, PDF (77/95 Pages) Maxim Integrated Products – 24-Bit Multi-Channel Low-Power
MAX11410
24-Bit Multi-Channel Low-Power
1.9ksps Delta-Sigma ADC with PGA
UTHRESH7 (0x2F)
UTHRESH7 holds the upper comparison threshold for the value in the DATA7 register. The comparison result is indicated
by the TOR_7 status bit. The comparison result indicated by TOR_7 is affected by the U_BN and FORMAT bits. If the
U_BN and/or FORMAT bits are changed, the threshold value should be changed accordingly.
BIT
23
22
21
20
19
18
17
16
Field
UTHRESH7[23:16]
Reset
Access Type
Write, Read
Bit
15
14
13
12
11
10
9
8
Field
UTHRESH7[15:8]
Reset
Access Type
Write, Read
Bit
7
6
5
4
3
2
1
0
Field
UTHRESH7[7:0]
Reset
Access Type
Write, Read
BITFIELD
UTHRESH7
BITS
23:0
DESCRIPTION
Upper comparison threshold for DATA7 value.
DATA0 (0x30)
The ADC conversion result is stored in DATA0 if this register is selected by the state of the DEST or GP_DEST register.
BIT
23
22
21
20
19
18
17
16
Field
DATA0[23:16]
Reset
Access Type
Write, Read
Bit
15
14
13
12
11
10
9
8
Field
DATA0[15:8]
Reset
Access Type
Write, Read
Bit
7
6
5
4
3
2
1
0
Field
DATA0[7:0]
Reset
Access Type
Write, Read
BITFIELD
DATA0
BITS
23:0
Conversion data.
DESCRIPTION
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