MAX11410 Datasheet, PDF (69/95 Pages) Maxim Integrated Products – 24-Bit Multi-Channel Low-Power

MAX11410
24-Bit Multi-Channel Low-Power
1.9ksps Delta-Sigma ADC with PGA
SELF_GAIN_128 (0x1F)
BIT
23
22
21
20
19
18
17
16
Field
SELF_GAIN_128[23:16]
Reset
Access Type
Write, Read
Bit
15
14
13
12
11
10
9
8
Field
SELF_GAIN_128[15:8]
Reset
Access Type
Write, Read
Bit
7
6
5
4
3
2
1
0
Field
SELF_GAIN_128[7:0]
Reset
Access Type
Write, Read
BITFIELD
SELF_GAIN_128
BITS
23:0
DESCRIPTION
Self-gain correction value for gain = 128.
LTHRESH0 (0x20)
LTHRESH0 holds the lower comparison threshold for the value in the DATA0 register. The comparison result is indicated
by the TUR_0 status bit. The comparison result indicated by TUR_0 is affected by the U_BN and FORMAT bits. If the
U_BN and/or FORMAT bits are changed, the threshold value should be changed accordingly.
BIT
23
22
21
20
19
18
17
16
Field
LTHRESH0[23:16]
Reset
Access Type
Write, Read
Bit
15
14
13
12
11
10
9
8
Field
LTHRESH0[15:8]
Reset
Access Type
Write, Read
Bit
7
6
5
4
3
2
1
0
Field
LTHRESH0[7:0]
Reset
Access Type
Write, Read
BITFIELD
LTHRESH0
BITS
23:0
DESCRIPTION
Lower comparison threshold for DATA0 value.
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