MAX11410 Datasheet, PDF (62/95 Pages) Maxim Integrated Products – 24-Bit Multi-Channel Low-Power

MAX11410
24-Bit Multi-Channel Low-Power
1.9ksps Delta-Sigma ADC with PGA
SYS_GAIN_A (0x15)
The System Gain Calibration A value is used to scale the offset-corrected conversion result, if selected by the SYSC_
DEST_SEL register. The format is fixed point, unsigned binary, and is unaffected by the U_BN and FORMAT bits. The
binary point is located after the MSB. The MSB corresponds to 2⁰, and the LSB corresponds to 2^-23.
Writes to this register are allowed. A value written to the register remains valid until either a new value is written or until an
on-demand system-calibration operation is performed, which will overwrite the current value. The system gain calibration
value scales the offset corrected result by up to 1.999999881x or can correct a gain error of –50%. The amount of positive
gain error that can be corrected is determined by modulator overload characteristics, which may be as much as +25%.
BIT
23
22
21
20
19
18
17
16
Field
SYS_GAIN_A[23:16]
Reset
Access Type
Write, Read
Bit
15
14
13
12
11
10
9
8
Field
SYS_GAIN_A[15:8]
Reset
Access Type
Write, Read
Bit
7
6
5
4
3
2
1
0
Field
SYS_GAIN_A[7:0]
Reset
Access Type
Write, Read
BITFIELD
SYS_GAIN_A
BITS
23:0
DESCRIPTION
System Gain A Calibration Value
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