MAX11410 Datasheet, PDF (37/95 Pages) Maxim Integrated Products – 24-Bit Multi-Channel Low-Power

MAX11410
24-Bit Multi-Channel Low-Power
1.9ksps Delta-Sigma ADC with PGA
SPI Interface
The interface is Mode 0 SPI/QSPI™/MICROWIRE®/DSP
compatible. Data is strobed in on SCLK rising edges.
The content of the SPI operation consists of a one-byte
register address and read/write command followed by a
one, two, or three-byte control or data word. Programming
is by a variable cycle (dictated by the register byte width)
SPI instruction framed by a CSB low interval. To abort a
command sequence, the rise of CSB must precede the
updating rising edge of SCLK.
Data out (DOUT) is updated on the falling edge of SCLK.
Until power-on or other wakeup times have elapsed,
reads and writes will have no effect.
DOUT/INTB
This output serves a dual function. In addition to the
serial-data output function, DOUT/INTB also indicates the
interrupt condition when CSB is low. To find the interrupt
state, assert CSB low and sample the INTB/DOUT output.
When performing a device readback, the DOUT/INTB pin
will reflect the interrupt states until the 9th SCLK falling
edge, at which point it will transition to the DOUT data.
SPI Transactions
All transactions consist of a read/write bit, register
address, and register data (returned or written). All
registers are either 8, 16, or 24 bits in length. Program
word execution happens on either the 16th, 24th, or
32nd edge, depending on the programmed register word
length. Paired SPI register reads and writes are not
supported. Writing to any register while a calibration or
conversion is in progress will result in the calibration or
conversion being aborted. Readback of any register will
not affect either calibration or conversion. Registers are
read and written MSB first.
There are three sets of registers for control, status, and
data. The 8-bit registers control conversion and power
modes, multiplexer connections, and other functions.
The 24-bit registers contain conversion data, calibration
coefficients, status information, and control over which
status bits are reflected in interrupt outputs. the 16-bit
registers contain the command addresses and data
values for the sequencer.
Figure 2. SPI Timing Diagram
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