MAX11410 Datasheet, PDF (70/95 Pages) Maxim Integrated Products – 24-Bit Multi-Channel Low-Power

MAX11410
24-Bit Multi-Channel Low-Power
1.9ksps Delta-Sigma ADC with PGA
LTHRESH1 (0x21)
LTHRESH1 holds the lower comparison threshold for the value in the DATA1 register. The comparison result is indicated
by the TUR_1 status bit. The comparison result indicated by TUR_1 is affected by the U_BN and FORMAT bits. If the
U_BN and/or FORMAT bits are changed, the threshold value should be changed accordingly.
BIT
23
22
21
20
19
18
17
16
Field
LTHRESH1[23:16]
Reset
Access Type
Write, Read
Bit
15
14
13
12
11
10
9
8
Field
LTHRESH1[15:8]
Reset
Access Type
Write, Read
Bit
7
6
5
4
3
2
1
0
Field
LTHRESH1[7:0]
Reset
Access Type
Write, Read
BITFIELD
LTHRESH1
BITS
23:0
DESCRIPTION
Lower comparison threshold for DATA1 value.
LTHRESH2 (0x22)
LTHRESH2 holds the lower comparison threshold for the value in the DATA2 register. The comparison result is indicated
by the TUR_2 status bit. The comparison result indicated by TUR_2 is affected by the U_BN and FORMAT bits. If the
U_BN and/or FORMAT bits are changed, the threshold value should be changed accordingly.
BIT
23
22
21
20
19
18
17
16
Field
LTHRESH2[23:16]
Reset
Access Type
Write, Read
Bit
15
14
13
12
11
10
9
8
Field
LTHRESH2[15:8]
Reset
Access Type
Write, Read
Bit
7
6
5
4
3
2
1
0
Field
LTHRESH2[7:0]
Reset
Access Type
Write, Read
BITFIELD
LTHRESH2
BITS
23:0
DESCRIPTION
Lower comparison threshold for DATA2 value.
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