MAX11410 Datasheet, PDF (60/95 Pages) Maxim Integrated Products – 24-Bit Multi-Channel Low-Power

MAX11410
24-Bit Multi-Channel Low-Power
1.9ksps Delta-Sigma ADC with PGA
SYS_OFF_A (0x13)
The system offset A calibration value is subtracted from each conversion result, if selected by the SYSC_DEST_SEL
register.
The data is always in 2’s complement binary format, and is unaffected by the U_BN and FORMAT bits. Writes to SYS_
OFF_A are allowed. A value written to the register remains valid until either a new value is written or until an on-demand
system-calibration operation is performed, which will overwrite the current value.
The system offset calibration value applied to the selected destination register is subtracted from the conversion result
after self-calibration, but before system gain correction. It is also applied prior to the 1x or 2x scale factor associated with
bipolar and unipolar modes.
BIT
23
22
21
20
19
18
17
16
Field
SYS_OFF_A[23:16]
Reset
Access Type
Write, Read
Bit
15
14
13
12
11
10
9
8
Field
SYS_OFF_A[15:8]
Reset
Access Type
Write, Read
Bit
7
Field
Reset
Access Type
BITFIELD
SYS_OFF_A
6
BITS
23:0
5
4
3
2
1
0
SYS_OFF_A[7:0]
Write, Read
DESCRIPTION
Offset calibration value subtracted from selected conversion results.
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