ISL78229 Datasheet, PDF (66/71 Pages) Intersil Corporation – 2-Phase Boost Controller with Drivers

ISL78229
For a 2-phase boost converter, the RMS current going through the
output current can be calculated by Equation 39 for D > 0.5,
where I_L is per phase inductor DC current. For D < 0.5, time
domain simulation is recommended to get the accurate calculation
of the input capacitor RMS current.
I_CoutRMS= I_L  1 – D  2D – 1 
(EQ. 40)
It is recommended to use multiple capacitors in parallel to
handle this output RMS current.
Input Capacitor
Depending upon the system input power rail conditions, the
aluminum electrolytic type capacitors are normally used to
provide a stable input voltage. The input capacitor should be able
to handle the RMS current from the switching power devices.
Refer to Equation 5 and Figure 62 on page 28 to estimate the
RMS current the input capacitors need to handle.
Ceramic capacitors must be placed near the VIN and PGND pin of
the IC. Multiple ceramic capacitors including 1µF and 0.1µF are
recommended. Place these capacitors as close as possible to the IC.
Power MOSFET
The external MOSFETs driven by the ISL78229 controller need to
be carefully selected to optimize the design of the synchronous
boost regulator.
The MOSFET's BV_DSS rating needs to have enough voltage
margin against the maximum boost output voltage plus the
phase node voltage transient during switching.
As the UG and LG gate drivers are 5V output, the MOSFET V_GS
need to be in this range.
The MOSFET should have low Total Gate Charge (Q_g), low
ON-resistance (r_DS(ON)) at VGS = 4.5V and small gate resistance
(R_g <1.5Ω is recommended). It is recommended that the
minimum V_GS threshold is higher than 1.2V but not exceeding
2.5V, in order to prevent false turn-on by noise spikes due to high
dv/dt during phase node switching and maintain low r_DS(ON)
under limitation of maximum gate drive voltage, which is 5.2V
(typical) for low-side MOSFET and 4.5V (typical) due to diode drop
of boot diode for high-side MOSFET.
Bootstrap Capacitor
The power required for high-side MOSFET drive is provided by the
boot capacitor connected between BOOT and PH pins. The
bootstrap capacitor can be chosen using Equation 41:
C_BOOT  _d----_VQ-----_Bg---_O-^a---^t-_O-^e---_T--
(EQ. 41)
Where Q_gate is the total gate charge of the high-side MOSFET
and dV_BOOT is the maximum droop voltage across the bootstrap
capacitor while turning on the high-side MOSFET.
Though the maximum charging voltage across the bootstrap
capacitor is PVCC minus the bootstrap diode drop (~4.5V), large
excursions below GND by PH node requires at least 10V rating for
this ceramic capacitor. To keep enough capacitance over the
biased voltage and temperature range, a good quality capacitor
such as X7R or X5R is recommended.
RESISTOR ON BOOTSTRAP CIRCUIT
In the actual application, sometimes a large ringing noise at the
PH node and the BOOT node are observed. This noise is caused
by high dv/dt phase node switching, parasitic PH node
capacitance due to PCB routing and the parasitic inductance. To
reduce this noise, a resistor can be added between the BOOT pin
and the bootstrap capacitor. A large resistor value will reduce the
ringing noise at PH node but limits the charging of the bootstrap
capacitor during the low-side MOSFET on-time, especially when
the controller is operating at very low duty cycle. Also large
resistance causes voltage dip at BOOT each time the high-side
driver turns on the high-side MOSFET. Make sure this voltage dip
will not trigger the high-side BOOT to PH UVLO threshold 3V (typical),
especially when a MOSFET with large Q_g is used.
Loop Compensation Design
The ISL78229 uses constant frequency peak current mode
control architecture with a Gm amp as the error amplifier.
Figures 74 and 75 show the conceptual schematics and control
block diagram, respectively.
Vo
RFB2
RFB1
R1
C1
Vfb FB
+
Gm
-
VREF
He1(s)
SLOPE
+
Gm
-
COMP
+
Vc
-
RCP
CCP1
ROEA
CCP2
VIN
RSEN
L
Gvcvo(s)
RESR
COUT
VOUT
RL
He2(s)
FIGURE 74. CONCEPTUAL BLOCK DIAGRAM OF PEAK CURRENT MODE CONTROLLED BOOST REGULATOR
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FN8656.3
February 12, 2016