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ISL78229 Datasheet, PDF (11/71 Pages) Intersil Corporation – 2-Phase Boost Controller with Drivers
ISL78229
Electrical Specifications Refer to Figure 3 on page 7 and Typical Application Schematics (page 8). Operating conditions unless
otherwise noted: VIN = 12V, VPVCC = 5.2V, and VVCC = 5.2V, TA = -40°C to +125°C (Note 8). Typicals are at TA = +25°C.
Boldface limits apply across the operating temperature range, -40°C to +125°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 7) TYP (Note 7) UNIT
Input Minimum Pulse Width - Fall-to-Rise
20
ns
Delay Time from Input Pulse Rising to LG1
Rising Edge Minus Dead Time tDT1
Input Impedance
CLG = OPEN, RDT = 50kΩ
Input impedance before synchronization
mode
35
ns
1
kΩ
Input impedance after synchronization mode
200
MΩ
CLKOUT
CLKOUTH
ICLKOUT = 500µA
VCC - VCC - 0.1
V
0.5
CLKOUTL
Output Pulse Width
ICLKOUT = -500µA
CCLKOUT = 100pF, tSW is each phase’s
switching period
0.1
0.4
V
1/12 * tSW
Phase Shift from LG1 Rising Edge to CLKOUT
Pulse Rising Edge
CLG1 = OPEN, CCLKOUT = OPEN,
fSW = 300kHz, tDT1 = 60ns (Refer to
Figure 65 on page 29 for the timing
diagram)
87
°
SOFT-START
Soft-Start Current
ISS
Minimum Soft-Start Prebias Voltage
4.5
5.0
5.5 µA
0
V
Maximum Soft-Start Prebias Voltage
1.6
V
Soft-Start Prebias Voltage Accuracy
VFB = 500mV
-25
Soft-Start Clamp Voltage
VSSCLAMP
3.25
HICCUP RETRY DELAY (Refer to “Fault Response Register SET_FAULT_RESPONSE (D2h)” on page 35 for more details)
0
3.47
25 mV
3.70 V
Hiccup Retry Delay
If Hiccup fault response selected
500
ms
REFERENCE VOLTAGE FOR OUTPUT VOLTAGE REGULATION
System Reference Accuracy
Measured at the FB pin
1.576 1.600 1.620 V
FB Pin Input Bias Current
VFB = 1.6V, TRACK = Open
ERROR AMPLIFIER FOR OUTPUT VOLTAGE REGULATION (Gm1)
-0.05
0.01
0.05 µA
Transconductance Gain
2
mA/V
Output Impedance
7.5
MΩ
Unity Gain Bandwidth
Slew Rate
Output Current Capability
CCOMP = 100pF from COMP pin to GND
CCOMP = 100pF from COMP pin to GND
3.3
±3
±300
MHz
V/µs
µA
Maximum Output Voltage
3.5
3.7
V
Minimum Output Voltage
0.1
0.3
V
PWM CORE
SLOPE Pin Voltage
480
500
520 mV
SLOPE Accuracy
Duty Cycle Matching
RSLOPE = 20k (0.1%)
-20
0
20
%
RSLOPE = 40.2k (0.1%)
-20
3
20
%
VRSENx = 30mV, RSETx = 665Ω (0.1%),
3
%
RSLOPE = 27k, fSW = 150kHz,
VCOMP = 2.52V, Measure
(TON_LG2 - TON_LG1)/(TON_LG2 + TON_LG1)*2
Submit Document Feedback 11
FN8656.3
February 12, 2016