ISL78229 Datasheet, PDF (60/71 Pages) Intersil Corporation – 2-Phase Boost Controller with Drivers

ISL78229
SET_FAULT_RESPONSE (D2h)
Definition: Set/Read the fault protection response which is either Hiccup or Latch-off determined by the corresponding bit of
SET_FAULT_RESPONSE register. The default value of the SET_FAULT_RESPONSE register is determined by the HIC/LATCH pin
configurations.
• When HIC/LATCH pin is pulled high (VCC), each of Bits [9:0] is set to 1 as default
• When the HIC/LATCH pin is pulled low (GND), each of Bits [9:0] is set to 0 as default
• When bit = 1, the fault protection response is Hiccup mode
• When bit = 0, the fault protection response is Latch-off mode
In Hiccup mode, the device will stop switching when a fault condition is detected, and restart from soft-start after 500ms (typical). This
operation will be repeated until fault conditions are completely removed.
In Latch-off mode, the device will stop switching when a fault condition is detected and PWM switching disabled even after fault
conditions are removed. In Latch-off status, the internal LDO is active to maintain PVCC voltage, and PMBus™ interface is accessible for
user to monitor the type of fault triggered or other parameters. By either toggling the EN pin or cycling VCC/PVCC below the POR
threshold will restart the system.
For related descriptions, refer to “Fault Response Register SET_FAULT_RESPONSE (D2h)” on page 35, and Table 3 on page 41 for some
fault related registers summary.
Data Length in Bytes: 2
Data Format: Bit Field
Type: R/W
Protectable: Yes
Default Value: Set by the HIC/LATCH pin. 03FFh when HIC/LATCH = VCC; 0000h when HIC/LATCH = GND.
Units: N/A
COMMAND
Format
Bit Position
Access
Function
Default Value
(HIC/LATCH = VCC)
Default Value
(HIC/LATCH = GND)
SET_FAULT_RESPOSE (D2h)
Bit Field
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
See Following Table
0000001111111111
0000000000000000
BIT NUMBER
0
1
2
3
4
5
6
7
FAULT NAME
Not used
Not used
VIN_OV
OT_NTC_FAULT
OC_AVG
OC2_PEAK
VOUT_UV
VOUT_OV
DEFAULT VALUE
Set by the
HIC/LATCH pin
Set by the
HIC/LATCH pin
Set by the
HIC/LATCH pin
Set by the
HIC/LATCH pin
Set by the
HIC/LATCH pin
Set by the
HIC/LATCH pin
Set by the
HIC/LATCH pin
Set by the
HIC/LATCH pin
Not used
MEANING
Not used
Input overvoltage fault (VIN_PIN >58V) protection response is Hiccup when
bit = 1, and Latch-off when bit = 0
NTC Over-temperature fault (NTC_PIN <300mV as default, threshold
programmable) protection response is Hiccup when bit = 1, and Latch-off
when bit = 0
Input average overcurrent fault (IMON_PIN >2V) protection response is
Hiccup when bit = 1, and Latch-off when bit = 0
Peak overcurrent fault (I_SENx >105µA) protection response is Hiccup when
bit = 1, and Latch-off when bit = 0
Output undervoltage fault (FB_PIN <80% VREF_DAC as default, threshold
programmable) protection response is Hiccup when bit = 1, and Latch-off
when bit = 0
Output overvoltage fault (FB_PIN >120% VREF_DAC as default, threshold
programmable) protection response is Hiccup when bit = 1, and Latch-off
when bit = 0
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FN8656.3
February 12, 2016