ISL78229 Datasheet, PDF (3/71 Pages) Intersil Corporation – 2-Phase Boost Controller with Drivers

Pin Configuration
ISL78229
ISL78229
(40 LD 6x6 WFQFN)
TOP VIEW
40 39 38 37 36 35 34 33 32 31
SLOPE 1
FB 2
COMP 3
SS 4
IMON 5
TRACK 6
ADDR1 7
ADDR2 8
PGOOD 9
FSYNC 10
PAD
30 BOOT1
29 UG1
28 PH1
27 LG1
26 PVCC
25 PGND
24 LG2
23 PH2
22 UG2
21 BOOT2
11 12 13 14 15 16 17 18 19 20
Functional Pin Description
PIN NAME
SLOPE
FB
COMP
SS
PIN #
1
2
3
4
DESCRIPTION
This pin programs the slope of the internal slope compensation. A resistor should be connected from the SLOPE pin to
GND. Refer to “Adjustable Slope Compensation” on page 33 for how to select this resistor value.
The inverting input of the error amplifier for the voltage regulation loop. A resistor network must be placed between the
FB pin and the output rail to set the boost converter’s output voltage. Refer to “Output Voltage Setting” on page 65 for more
details.
There are also output overvoltage and undervoltage comparators on this pin. Refer to “Output Undervoltage Fault” on
page 35 and “Output Overvoltage Fault” on page 36 and for more details.
The output of the transconductance error amplifier (Gm1) for the output voltage regulation loop. Place the compensation
network between the COMP pin and ground. Refer to “Output Voltage Regulation Loop” on page 26 for more details.
The COMP pin voltage can also be controlled by the constant current control loop error amplifier (Gm2) output through
a diode (D_CC) when the constant current control loop is used to control the input average current. Refer to “Constant
Current Control (CC)” on page 37 for more details.
A capacitor placed from SS to ground will set up the soft-start ramp rate and in turn determine the soft-start time. Refer
to “Soft-Start” on page 31 for more details.
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FN8656.3
February 12, 2016