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ISL78229 Datasheet, PDF (37/71 Pages) Intersil Corporation – 2-Phase Boost Controller with Drivers
ISL78229
Peak Overcurrent Fault (OC2_PEAK)
If either of the two individual phase’s current sense signal ISENx
reaches 105µA (OC2_TH = 105µA), the Peak Overcurrent fault
(OC2_PEAK) event will be triggered. This fault protection is
intended to protect the device by shutdown (Hiccup or Latch-off)
from a worst case condition where OC1 cannot limit the inductor
peak current.
This fault detection is active at the beginning of soft-start (t5 as
shown in the Figure 67 on page 30).
When an OC2_PEAK fault event is triggered, the corresponding
bit (OC2_PEAK, Bit [5]) in the FAULT_STATUS register (“Fault Flag
Register FAULT_STATUS (D0h) and SALERT Signal” on page 34 and
Table 3 on page 41) is set to 1 and the SALERT pin is pulled low.
At the same time, when an OC2_PEAK fault event is triggered,
since the OC2_PEAK fault protection response is enabled by
default as the OC2_PEAK bit (Bit [5]) is set 0 by default in the
FAULT_MASK register (refer to “Fault Mask Register FAULT_MASK
(D1h)” on page 35 and Table 3 on page 41), the ISL78229 will
respond with fault protection actions to shut down the PWM
switching and enters either Hiccup or Latch-off mode as
described in “Fault Response Register SET_FAULT_RESPONSE
(D2h)” on page 35 and Table 3 on page 41.
The OC2_PEAK fault protection can be disabled by setting the
OC2_PEAK bit (Bit [5]) in “Fault Mask Register FAULT_MASK (D1h)”
on page 35 to 1 via PMBus™. If disabled, there will be no fault
protection actions when OC2_PEAK fault is triggered, and the
ISL78229 will keep PWM switching and normal operation.
Under the selection of OC2_PEAK fault protection activated with
Hiccup response, when both phases’ peak current sense signal
ISENx no longer trip the OC2_PEAK thresholds (105µA), the
device will return to normal switching and regulation through
Hiccup soft-start. However, as described in the “Fault Flag Register
FAULT_STATUS (D0h) and SALERT Signal” on page 34, the bit = 1
status in the FAULT_STATUS register will not be automatically
cleared/reset to 0 by the device itself and the SALERT pin is kept
low. The bits in the FAULT_STATUS register can only be cleared to
0 by a Write command, or CLEAR_FAULTS command via
PMBus™, or EN/POR recycling. When all the bits in the
FAULT_STATUS register are 0, the SALERT pin is released to be
pulled HIGH.
The equivalent inductor peak current threshold for the
OC2_PEAK fault protection can be calculated by Equation 20:
IOC2x = 105  10–6  R-R----SS----EE----NT----xx- A
(EQ. 20)
Constant Current Control (CC)
A dedicated constant average Current Control (CC) loop is
implemented in the ISL78229 to control the input current to be
constant at overload conditions, which means constant input
power limiting under a constant input voltage.
As shown in Figure 3 on page 7, the VIMON represents the average
input current and is sent to the error amplifier Gm2 input to be
compared with the internal CC reference VREF_CC (which is 1.6V as
default and can be programmed to different values via PMBus™
command “CC_LIMIT (D5h)” on page 63). Gm2 output is driving
COMP voltage through a diode DCC. Thus, the COMP voltage can be
controlled by either Gm1 output or Gm2 output through DCC.
At normal operation without overloading, VIMON is lower than the
VREF_CC (1.6V at default). Therefore, Gm2 output is HIGH and DCC is
blocked and not forward conducting. The COMP voltage is now
controlled by the voltage loop error amplifier Gm1’s output to have
output voltage regulated.
At input average current overloading case, when VIMON reaches
VREF_CC (1.6V at default), Gm2 output falls and DCC is forward
conducting, and Gm2 output overrides Gm1 output to drive COMP.
In this way, the CC loop overrides the voltage loop, meaning VIMON is
controlled to be constant achieving average constant current
operation. Under certain input voltage, input CC makes input power
constant for the boost converter. Compared to peak current limiting
schemes, the average constant current control is more accurate to
control the average current to be constant, which is beneficial for the
user to accurately control the maximum average power for the
converter to handle.
The CC current threshold should be set lower than the OC1 peak
current threshold with margin. Generally, the OC1 peak current
threshold (per phase) is set 1.5 to 2 times higher than the CC
current threshold (referred to as per phase average current). This
matches with the physics of the power devices that normally
have higher transient peak current rating and lower average
current ratings. The OC1 provides protection against the transient
peak current, which can be higher than the power devices can
handle. The CC controls the average current with slower
response, but with much more accurate control of the maximum
power the system has to handle at overloading conditions.
1. When fast changing overloading occurs, since VIMON has
sensing delay of RIMON*CIMON, CC does not trip at initial
transient load current until it reaches the CC reference
1.6V (default). OC1 will be triggered first to limit the inductor
peak current cycle-by-cycle.
2. After the delay of RIMON*CIMON, when VIMON reaches the CC
reference 1.6V (default), the CC control starts to work and
limit duty cycles to reduce the inductor current and keep the
sum of the two phases’ inductor currents being constant. The
time constant of the RIMON*CIMON is typically on the order of
10 times slower than the voltage loop bandwidth so that the
2 loops will not interfere with each other.
CC loop is active at the beginning of soft-start.
The CC threshold values can be set to 8 options via PMBus™
command “CC_LIMIT (D5h)” on page 63, which ranges from 1.25V
to 1.6V with a default setting of 1.6V.
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FN8656.3
February 12, 2016