ISL78229 Datasheet, PDF (44/71 Pages) Intersil Corporation – 2-Phase Boost Controller with Drivers

ISL78229
COMMAND
CODE
COMMAND NAME
D0h FAULT_STATUS
D1h FAULT_MASK
TABLE 6. PMBus™ COMMAND SUMMARY (Continued)
ACCESS
NUMBER
OF DATA DATA
BYTES FORMAT
DEFAULT
SETTING
DESCRIPTIONS
REFER
TO PAGE
Read/Write 2
BIT
0000h Intersil defined register. Each bit’s value records page 58
Word
one specific fault or warning event (as listed below)
being triggered or not.
Bits [15:10]: Unused
Bit [9]: PLL_LOCK fault
Bit [8]: PLLCOMP_SHORT fault
Bit [7]: VOUT_OV fault
Bit [6]: VOUT_UV fault
Bit [5]: OC2_IPEAK fault
Bit [4]: OC_AVG fault
Bit [3]: OT_NTC_FAULT fault
Bit [2]: VIN_OV fault
Bit [1]: OT_NTC_WARN warning
Bit [0] CML warning
FAULT_STATUS Bit = 1 stays unchanged until using
a Write command to set Bit = 0, Write CLEAR FAULT
command or POR cycle.
FAULT_STATUS is not masked by FAULT_MASK
register.
Read/Write 2
BIT
0049h Intersil defined register. Each bit controls one
page 59
Word
specific fault condition listed below to be masked
(ignored) or not.
Bits [15:10]: Not used
Bit [9]: ignore PLL_LOCK fault
Bit [8]: ignore PLLCOMP_SHORT fault
Bit [7]: ignore VOUT_OV fault
Bit [6]: ignore VOUT_UV fault
Bit [5]: ignore OC2_IPEAK fault
Bit [4]: ignore OC_AVG fault
Bit [3]: ignore OT_NTC_FAULT fault
Bit [2]: ignore VIN_OV fault
Bit [1]: Not used
Bit [0]: Not used
Bit = 1 means to ignore, no protecting action taken
by the device for the triggered fault, and the
ISL78229 keeps its normal PWM switching and
operations.
Bit = 0 means to respond with protecting action to
enter either Hiccup or Latch-off as fault response as
described in “Fault Response Register
SET_FAULT_RESPONSE (D2h)” on page 35.
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FN8656.3
February 12, 2016