ISL78229 Datasheet, PDF (58/71 Pages) Intersil Corporation – 2-Phase Boost Controller with Drivers

ISL78229
FAULT_STATUS (D0h)
Definition: Intersil defined register. This command reports if a specific fault condition has ever been triggered. Each bit represents one
specific fault condition (listed in table below).
The meanings of bit value are defined as follows:
• Bit = 1 means this fault occurred
• Bit = 0 means this fault did not occur.
Bits [9:2] control total of 8 fault conditions. Bits [15:10] and Bits [1:0] are not used.
For more descriptions about this command and related commands, also refer to “Fault Flag Register FAULT_STATUS (D0h) and SALERT
Signal” on page 34 and Table 3 on page 41.
Data Length in Bytes: 2
Data Format: Bit Field
Type: R/W
Protectable: Yes
Default Value: 0000h
Units: N/A
COMMAND
Format
Bit Position
Access
Function
Default Value
FAULT_STATUS (D0h)
Bit Field
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
See Following Table
0000000000000000
BIT NUMBER
0
1
2
3
4
5
6
7
8
9
15:10
FAULT NAME
CML
OT_NTC_WARN
VIN_OV
OT_NTC_FAULT
OC_AVG
OC2_PEAK
VOUT_UV
VOUT_OV
PLLCOMP_SHORT
PLL_LOCK
Not used
DEFAULT VALUE
0
0
0
0
0
0
0
0
0
0
000000
MEANING
Communications warning (for unsupported command, PEC error)
External over-temperature warning (NTC_PIN <450mV as default, threshold
programmable)
Input overvoltage fault (VIN_PIN >58V)
External over-temperature fault (NTC_PIN <300mV as default, threshold
programmable)
Input average overcurrent fault (IMON_PIN >2V as default, threshold
programmable)
Per phase peak overcurrent fault (I_SENx >105µA)
Output undervoltage fault (FB_PIN <80% VREF_DAC as default, threshold
programmable)
Output overvoltage fault (FB_PIN >120% VREF_DAC as default, threshold
programmable)
PLLCOMP pin shorted to high potential voltages (PLLCOMP_PIN >1.7V)
PLL loop fault due to reaching minimum frequency (detect the minimum
frequency of 37kHz as typical)
Not used
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FN8656.3
February 12, 2016