81348 Datasheet, PDF (78/89 Pages) Intel Corporation – Two Integrated Intel XScale processors

Intel^® 81348—Electrical Specifications
4.3.8 Boundary Scan Test Signal Timings
Table 31.
Boundary Scan Test Signal Timings
Symbol
Parameter
Min. Max Units
Notes
T_JTF TCK Frequency
0 66 MHz
T_JTCH TCK High Time
7.0
ns Measured at 1.5 V (1)
TJTCL TCK Low Time
7.0
ns Measured at 1.5 V (1)
T_JTCR TCK Rise Time
T_JTCF TCK Fall Time
5 ns 0.8 V to 2.0 V (1)
5 ns 2.0 V to 0.8 V (1)
T_JTIS1 Input Setup to TCK—TDI, TMS 3.0
T_JTIH1 Input Hold from TCK—TDI, TMS 2.0
ns (3)
ns (3)
T_JTOV1 TDO Output Valid Delay
T_OF1 TDO Float Delay
4.25 13.25 ns Relative to falling edge of TCK (2)
4.25 13.25 ns Relative to falling edge of TCK (4)
N_1.otes: _{Not tested.}
2. See Figure 11, “Output Timing Measurement Waveforms” on page 79.
43..
ASFiegfeluoraFeitg1cuo1rne, d“1iOt2iuo,tn“pIuontcpcTuuitmrsTiinwmghineMgneatMhseeuaroseuumtrpeeumnttecWnutarrWveeanfvoterbmfeocsrom”mosn”esopnlaegspesagt7he9a.8n0I._LO. Float delay is not tested. See
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78
December 2007
Order Number: 315038-003US