81348 Datasheet, PDF (25/89 Pages) Intel Corporation – Two Integrated Intel XScale processors

Package Information—Intel^® 81348
Table 7.
Storage Interface Signals (Sheet 2 of 3)
Name
Count Type
Description
S_ACT3
S_STAT3
SS_CALOCCT4K1/
SS_LOSTAADT14 /
S_ACT5
S_STAT5
SS_DAACTTA6IN/₁
SS_DSATTAATO6U/_T1
Storage Activity: When SGPIO[0] is disabled, this pin can be used
1
OD
ted_Norn_{oigvdtierenin:}vee[f3raoC]nm.onTLanhEneeDcSpttiGonthPicenIaOdLni.cEabDteetdoaircaeticsvteitrdyieriosvnerentshbiesytloitnrhkepufsoltlroerdsatougrepagetonegViCneC.or
1
OD ^{SdpritniovrceaaganenbSLeEtaDdtiurteso:citnWddhricievanetenSGsbtPyaIttOuhs[e0o]sftitoshrdeaigslieanbkelnefogdri,nstehtoiosrrapgdinerivecenanngifnbreeo[mu3s]ae.ndThtoe}
S_NG_oP_teIO_: . _{Connect the LED to a series resistor pulled up to VCC.}
Stotodrraivgee _{aAnctLivEitDy:toWinhdeincaStGePaIcOti[v1i]tyisodnisthabelelidn,ktfhoirs sptionracgaen} be used
1
OD
ed_Nrnoigvtie_enn_:e[f4roC]m.onTanhneecSptiGnthPceIaOLn.EbDetdoiraecsterdierisverensbisytotrhepusltloerdaugep
engine or
to VCC.
Serial Clock: (default) When SGPIO[1] is enabled this pin is the
s_Se_Cr_Lia_Ol _Co_Kut₁puist _{uclsoecdktrounlanticnhgS}a_Lt_O9_A9_D.8₁K, H_Sz_D._AT_Th_Ae_Ofa_Ull_Tin₁gaenddge_SDof_ATAIN1.
Sdrtiovreagaen SLEtaDtutso:inWdhiceanteSGstPaItOus[1o]f itshdeislianbklefodr, _{sthtoisrapgine ecnanginbee[u4s]e.} dThtoe
1
OD
pS_NiG_onP_tc_eIaO:n.
be direct
Connect
driven by the storage engine or driven from an
the LED to a series resistor pulled up to VCC.
Serial Load: (default) When SGPIO[1] is enabled, this pin is the
ssetrreiaalmlo.ad clock. It is driven high to indicate the start of the bit
Stotodrraivgee _{aAnctLivEitDy:toWinhdeincaStGePaIcOti[v1i]tyisodnisthabelelidn,ktfhoirs sptionracgaen} be used
1
OD
ed_Nrnoigvtie_enn_:e[f5roC]m.onTanhneecSptiGnthPceIaOLn.EbDetdoiraecsterdierisverensbisytotrhepusltloerdaugep
engine or
to VCC.
1
OD ^{SdpritniovrceaaganenbSLeEtaDdtiurteso:citnWddhricievanetenSGsbtPyaIttOuhs[e1o]sftitoshrdeaigslieanbkelnefogdri,nstehtoiosrrapgdinerivecenanngifnbreeo[mu5s]ae.ndThtoe}
S_NG_oP_teIO_: . _{Connect the LED to a series resistor pulled up to VCC.}
Stotodrraivgee _{aAnctLivEitDy:toWinhdeincaStGePaIcOti[v1i]tyisodnisthabelelidn,ktfhoirs sptionracgaen} be used
1
OD
ed_Nrnoigvtie_enn_:e[f6roC]m.onTanhneecSptiGnthPceIaOLn.EbDetdoiraecsterdierisverensbisytotrhepusltloerdaugep
engine or
to VCC.
Serial Data In: (default) When SGPIO[1] is enabled, this pin is the
seeigrhiatldinepvuictedsaatrae. Tsuhpepreoratreed.three bits of data per device and up to
Sdrtiovreagaen SLEtaDtutso:inWdhiceanteSGstPaItOus[1o]f itshdeislianbklefodr, _{sthtoisrapgine ecnanginbee[u6s]e.} dThtoe
1
OD
pS_NiG_onP_tc_eIaO:n.
be direct
Connect
driven by the storage engine or driven from an
the LED to a series resistor pulled up to VCC.
Serial Data Out: (default) When SGPIO[1] is enabled, this pin is the
seeigrhiatldoeuvtpicuetsdaartea.suTphpeorertaerde. three bits of data per device and up to
December 2007
Order Number: 315038-003US
Intel^® 81348 I/ODParotacsehsesoert
25