81348 Datasheet, PDF (27/89 Pages) Intel Corporation – Two Integrated Intel XScale processors

Package Information—Intel^® 81348
Table 8.
Interrupt Signals
Name
Count
PX_ININTT[3[D:0:]A#]#_/ /
GPIO[11:8]
4
XINT[7:4]# /
GPIO[15:12]
4
GXPMIPNIOOTN[[O175:U0:T8]]/_{# /}
8
HPI#
1
NMI0#
1
NMI1#
1
Total
19
Type
OD
I
RAsIs/tyO(nPc)
ActLow
I
AAcIst/yLOnowc
I/O
I
O
RAssty(npc)
I
AAcstyLnowc
AsyInc
ActLow
AAcstyLInowc
Description
When PCIX_EP# = 0:
• PCI Interrupt requests an interrupt from the central resource.
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device driver clears the pending request.
When PCIX_EP# = 1:
• External Interrupt requests are used by external devices to
request interrupt service. These pins are level-detect inputs
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to the
The interrupt
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General Purpose I/O pins can be selected on a per-pin basis as
general-purpose inputs or outputs. The default mode is a general-
purpose input.
EisnyxtnteecrrhrnuraoplntIiszneetredvr.ircTuehp.etTsRheeeqpsuienespsitgnsosataroeretuhlseeevd_XeIlb-Nyde_Tet_[xe₇tce_:t4rna_]an_#lddianerpveuictiensstoetfrontrhaeellqyuest
interrupt controller. The interrupt controller can steer the interrupt
tXoSceaitlhee_®r
the FIQ or
processor.
the
IRQ
internal
interrupt
input
of
the
Intel
General Purpose I/O pins can be selected on a per-pin basis as
general-purpose inputs or outputs. The default mode is a general-
purpose input.
General Purpose I/O pins can be selected on a per-pin basis as
general-purpose inputs or outputs. The default mode is a general-
purpose input.
External Interrupts are used by external devices to request
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be unmasked in the INTCTL[3:0] register.
Performance Monitor Out:
The PMON unit output indicator generates a signal on the GPIO[7]
povinerwrihdeentheenanbolermd _{ainl G}th_Pe_IOPM_[7O_]NEfuNncrteigoins.ter. When enabled it will
High-Priority Interrupt causes a high-priority interrupt to the I/O
psyronccehsrsoonri.zeTdh.is pin is level-detect only and is internally
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edge-detect only and is internally synchronized.
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December 2007
Order Number: 315038-003US
Intel^® 81348 I/ODParotacsehsesoert
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