81348 Datasheet, PDF (38/89 Pages) Intel Corporation – Two Integrated Intel XScale processors

Intel^® 81348—Package Information
Table 14. Functional Pin Mode Behavior (Sheet 3 of 4)
Pin
BoundaryScan ^HighZ
Reset _(EndPoint)
Reset(Central ^Resource)
Normal
32-BitSDRAM
PCIX_32BIT#
PCIX_PULLUP#
Whenonly ^{PCI-X Interface Active} Whenonly _PCIExpress* ^{Interface Active}
RBIAS[1:0]
– AO AO AO –
–
–
–
–
RBIAS_SENSE[1:0]
–
AI
AI
AI
–
–
–
–
–
S_ACT0 / SCLOCK0
Z
Z
Z VO –
–
–
–
–
S_STAT0 / SLOAD0
Z
Z
Z VO –
–
–
–
–
S_ACT1
Z
Z
Z VO –
–
–
–
–
S_STAT1
Z
Z
Z VO –
–
–
–
–
S_ACT2 / SDATAIN0
Z
Z
Z VO –
–
–
–
–
S_STAT2 / SDATAOUT0 Z
Z
Z
VO
–
–
–
–
–
S_ACT3
Z
Z
Z
VO
–
–
–
–
–
S_STAT3
Z
Z
Z
VO
–
–
–
–
–
S_ACT4 / SCLOCK1
Z
Z
Z
VO
–
–
–
–
–
S_STAT4 / SLOAD1
Z
Z
Z
VO
–
–
–
–
–
S_ACT5
Z
Z
Z
VO
–
–
–
–
–
S_STAT5
Z
Z
Z
VO
–
–
–
–
–
S_ACT6 / SDATAIN1
Z
Z
Z
VO
–
–
–
–
–
S_STAT6 / SDATAOUT1 Z
Z
Z
VO
–
–
–
–
–
S_ACT7
Z
Z
Z
VO
–
–
–
–
–
S_STAT7
Z
Z
Z
VO
–
–
–
–
–
RREEFFCCLLKKPN,
–
VI
VI
VI
–
–
–
GNVID/
–
PPEETTPN[[77::00]],
–
Z
Z
VO
–
–
–
Z
–
PPEERRPN[[77::00]],
–
ID ID
VI
–
–
–
Z
–
PE_CALP
–
AO AO AO
–
–
–
Z
–
PE_CALN
–
AO AO AO
–
–
–
Z
–
PX_ININT[T3[D:0:]A#]# /
Z Z/VI Z/VI VB
–
–
H
–
–
XINT[7:4]#
–
VI
VI
VI
–
–
–
–
–
GXPMIPNIOOTN[[O175:U0:T8]]/_{# /}
Z
VI
VI
VB
–
–
–
–
–
HPI#
–
VI
VI
VI
–
–
–
–
–
NMI0#
–
VI
VI
VI
–
–
–
–
–
NMI1#
–
VI
VI
VI
–
–
–
–
–
SCL0
Z
Z
Z
VB
–
–
–
–
–
Notes:
0X1 === dddrrriiivvveeennn tttooo VVu^CS_n^CS_{known state}
PIHDD===pTuphluleelld-inuupppudttiosisaVbd^Clie^Csdabled.
LOGDN=TDp==ullOTeinde _{DdtooiewGTnreotruomnVidnS.aStion}
EIAA _{== IEnxtteerrnnaallAArrbbititeerrmmooddee}
Z = output, pull-up/down disabled
VVVIBO===naaeceVtsdalltiidokeOdaruivtVpeaulatidlVeBaviledidliriIesncdptiruoitvnealenlv.peiln.
AA*IO===aAfAtnenaraloplogogwIOnepruutfpatuilletsvleeeqvlueel _{nce completes}
“-” = unaffected by this mode
a. MA[14] is only needed for 4GB memory support. When 4GB memory is not used this pin is NC.
DInatteal^®sh8e1et348 ^{I/O Processor}
38
December 2007
Order Number: 315038-003US