81348 Datasheet, PDF (45/89 Pages) Intel Corporation – Two Integrated Intel XScale processors

Datasheet—Intel^® 81348
Figure 6.
Intel^® 81348 I/O processor Ballout—Package Bottom (Right Side)
V
U
T
R
P
N
M
L
K
J
H
G
F
E
D
C
B
A
cb
[6]
cb
[2]
dq
dq
dq dqs# dqs
[44] [40] [41] [5]
[5]
dq
[47]
dq
[43]
dq
[60]
dq
[56]
dq dqs# dqs
[57] [7]
[7]
dq
[63]
vss
37
cb
[7]
cb
[3]
vss
dq
[45]
dm
[5]
vss
dq
[46]
dq
[42]
vss
vss
dq
[61]
dm
[7]
vss
dq
[62]
dq
dq
[58] [59]
vss
36
vss
m_ck#
[2]
dq
[36]
dq
[37]
dm dqs# dqs
[4]
[4]
[4]
dq
dq
dq
dq
[34] [35] [52] [53]
dm dqs# dqs dq
dq
[6]
[6]
[6]
[50] [51]
nc
vss
35
m_ck# m_ck
[0]
[2]
vss
dq
dq
[32] [33]
vss
dq
[38]
dq
[39]
vss
vss
dq
[48]
dq
[49]
vss
dq
[54]
dq
[55]
vss
nc
nc
34
ma
[0]
ba
[1]
ma
[10]
ba
[0]
ras#
cs#
[0]
vss
we# cas#
odt
[0]
ma
[13]
cs#
[1]
odt
[1]
vss
nc
ma
[14]^a
nc
nc
33
vcc1 vcc1 vcc1 vcc1 vcc1 vcc1 vcc1 vcc1 vcc1 vcc1 vcc1 vcc3 vcc3
p8
p8
p8
p8
p8
p8
p8
p8
p8
p8
p8
p3
p3
nc
nc
nc
nc
nc
32
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1 vcc3
p2x
p3
nc
nc
nc
nc
nc
nc
31
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc3
p3
nc
nc
vss
nc
vss
nc
30
therm
da
vsspllx
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1 vcc3
p2x
p3
nc
nc
nc
nc
nc
nc
29
therm vcc1
dc
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc3
p3
nc
nc
nc
nc
nc
nc
28
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1 vcc3 s_
s_
p2x
p3 stat3 act4
vss
s_
stat5
vss
s_
act1
27
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc3 s_
s_
s_
s_
s_
s_
p3 stat4 stat6 stat7 act0 stat2 act5
26
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1 vcc3 s_
s_
s_
s_
s_
s_
p2x
p3
act6 stat1 act7 act3 act2 stat0
25
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2
vss
vcc1
p2as
vcc1
p2as
vcc1
p2as
vssas
vssas
vssas
vssas
24
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1 vcc1 vcc1 vcc1
p2 p2as p2as p2as
s_
txn
[3]
s_
s_
s_
txp[3] rxn[3] rxp[3]
23
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2x
vss
vcc1
p2
vss
vcc1 vcc1 vcc1
p2as p2as p2as
s_
txn
[1]
s_
s_
s_
txp[1] rxn[1] rxp[1]
22
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1 vssplls s_
p2
0
clkp
nc
rbias_
nc sense vssas vssas vssas vssas 21
[0]
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2plls0
s_
clkn
nc
nc
rbias
[0]
s_
txn
[0]
s_
s_
s_
txp[0] rxn[0] rxp[0]
20
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1 vcc1 vcc1 vcc1
p2 p8s p8s p8s
s_
txn
[2]
s_
s_
s_
txp[2] rxn[2] rxp[2]
19
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p8s
vcc1
p8s
vcc1
p8s
vssas
vssas
vssas
vssas
18
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vssds vssds
vcc1
p2ds
s_
txn
[7]
s_
s_
s_
txp[7] rxn[7] rxp[7]
17
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vssplls
1
vss
nc
nc
rbias_ s_
sense txn
[1]
[5]
s_
s_
s_
txp[5] rxn[5] rxp[5]
16
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1 vcc1
p2 p2plls1
vss
nc
nc
rbias
[1]
vssas
vssas
vssas
vssas
15
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vssds
vcc1
p2ds
vssds
s_
txn
[4]
s_
s_
s_
txp[4] rxn[4] rxp[4]
14
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vcc1
p2ds
vssds
vcc1
p2ds
s_
txn
[6]
s_
s_
s_
txp[6] rxn[6] rxp[6]
13
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2ds
vcc1
p2ds
vssds vssas
vssas
vssas
vssas
12
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2pllp
vsspllp
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc3 gpio
p3
[6]
gpio
[5]
gpio
[7]
gpio
[3]
gpio
[1]
11
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1 vcc3 gpio
p2
p3
[4]
vss
gpio
[2]
vss
gpio
[0]
10
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc3 xint# xint# xint# xint# xint#
p3
[7]
[4]
[5]
[3]
[1]
9
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vcc3
p3
hs_
led_out
nmi0#
xint#
[6]
xint#
[0]
xint#
[2]
8
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc1
p2
vss
vcc3
p3
nmi1#
vss
hpi#
vss
hs_
enum#
7
vcc3
p3
vccvio
vcc3
p3
vcc3
p3
vccvio
vcc3
p3
vccvio vccvio
vcc3
p3
vcc3
p3
vccvio
vcc3
p3
vcc3
p3
hs_
freq
[0]
hs_
freq
[1]
hs_
lstat
u0_
rx
d
u0_
rts#
6
p_
ad
[13]
vccvio
p_
trdy#
p_
ad
[16]
vccvio
p_
idsel
p_
p_
ad vccvio ad
[26]
[31]
p_
gnt#
[0]
vccvio
p_
gnt#
[3]
p_
cal
[0]
vcc3
p3
nc
u1_
rx
d
u0_
tx
d
u0_
cts#
5
p_
ad
[11]
p_
par
vss
p_
frame#
p_
ad
[20]
vss
p_
ad
[24]
p_
ad
[30]
p_
p_
vss gnt# req# vss
[1]
[3]
p_
bmi
warm_
rst#
vss
u1_
rts#
u1_
tx
d
u1_
cts#
4
p_
ad
[12]
p_
ad
[15]
p_
stop#
p_
devsel
#
p_
ad
[18]
p_
ad
[22]
p_
ad
[23]
p_
ad
[28]
p_
ad
[27]
nc
p_
p_
p_
gnt# req# cal
[2]
[2]
[1]
nc
p_
p_
p_
cal clko clko vss
[2]
[2]
[3]
3
p_
p_
p_
p_
p_
p_
ad cbe# vss pcixca cbe# vss
ad
ad
vss
nc
[10] [1]
p
[2]
[21] [25]
nc
vss
p_
rst#
vss
p_
clkout
p_
clko
[0]
vss
2
p_
m66en
p_
ad
[14]
p_
p_
p_
serr# perr# irdy#
p_
ad
[17]
p_
p_
p_
p_
p_
ad cbe# ad req# req#
[19] [3] [29]
[0]
[1]
nc
p_
rstout#
p_
clko
[1]
p_
clkin
vss
1
a. MA[14] is only needed for 4GB memory support, otherwise this pin remains NC.
December 2007
Order Number: 315038-003US
Intel^® 81348 I/ODParotacsehsesoert
45