81348 Datasheet, PDF (13/89 Pages) Intel Corporation – Two Integrated Intel XScale processors

Features—Intel^® 81348
2.2.5
2.2.6
2.2.7
2.2.8
2.2.9
2.2.10
Messaging Unit
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DDR2 Memory Controller
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SRAM Memory Controller
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Peripheral Bus Interface
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I²C Bus Interface Units
There are three I²C (Inter-Integrated Circuit) Bus Interface Units that allow the Intel
XScale^® processor to serve as a master and slave device residing on the I²C bus. The
I²C0 allows the I/O processor to interface to a storage enclosure processor, SEP. For
more information, refer to I²C Peripherals for Microcontrollers (Philips
Semiconductor)¹.
UART Units
The 81348 includes two UART units. The UART unit allow the two Intel
XScale^®processors to serve as a master and slave device residing on the UART bus.
The UART units use a serial bus consisting of a two-pin interface. UART0 allows the
81348 to interface to a console port for debugging. Also refer to the National
Semiconductor* 16550 device specification².
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December 2007
Order Number: 315038-003US
Intel^® 81348 I/ODParotacsehsesoert
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