CD1283 Datasheet, PDF (30/94 Pages) Intel Corporation – IEEE 1284-Compatible Parallel Interface

CD1283 — IEEE 1284-Compatible Parallel Interface
Figure 5. Interrupt Generation Logic (Continued)
DMAwrerr (DER[7])
(DMAACK* w/o
DMAREQ*)
DMArderr (DER[6])
(DMAACK* w/o
DMAREQ*)
Bufwrerr (DER[5]) (write to
non-empty DMABUF)
Bufrderr (DER[4]) (Read
from empty DMABUF)
ErrEn
(PFCR[1])
DataErr
(PFSR[0])
HR1wrerr (DER[3])
(write to non-empty
HR1)
HR1rderr (DER[2])
(Read from empty
HR1))
HR2wrerr (DER[1])
(Write to non-empty
HR2)
HR2rderr (DER[0])
(Read from empty HR2)
DataErr
(PFSR[0])
OneChar
(PFSR[1])
Timeout
(PFSR[5])
Interface in forward direction, PFHR2 full,
PFHR1 empty, and
Timeout (PFSR[5]) is set.
Stale (PFSR[3]) is set and, if
interface is in forward direc-
tion, the FIFO is empty.
IntEn
(PFCR[4])
OneChar
(PFSR[1])
Timeout
(PFSR[5])
Pipeline
(PIR[5])
PPort
(PIR[6])
Pipeline
(PIR[5])
PPireq
(PIR[7])
SRP
(SVRR[3])
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Datasheet