CD1283 Datasheet, PDF (20/94 Pages) Intel Corporation – IEEE 1284-Compatible Parallel Interface

CD1283 — IEEE 1284-Compatible Parallel Interface
Table 2. Virtual Registers
Name
Hex
Bit 7
EOSRR
60
X^†
PIVR
40
X
† ‘X’ indicates ‘don’t care’.
Bit 6
X
X
Bit 5
X
X
Bit 4
X
X
Bit 3
X
X
Bit 2
X
IT2
Bit 1
X
IT1
Bit 0
X
IT0
Page
56
56
Table 3. Parallel Pipeline Registers
Name
Hex
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
DER
33 DMAwrerr DMArderr Bufwrerr Bufrderr HR1wrerr HR1rderr HR2wrerr HR2rderr 57
DMABUF
(High
30
15
14
13
12
11
10
9
byte)
8
58
DMABUF
(Low byte)
30
7
6
5
4
3
2
1
0
58
HRSR
34 HR1full HR1tag HR2full HR2tag DMAfull DMAempty DMAact
Ctnot0
58
HTVR
24 HTVR[7] HTVR[6] HTVR[5] HTVR[4] HTVR[3] HTVR[2] HTVR[1] HTVR[0] 59
LIVR
18
User-Defined Bits
IT2
IT1
IT0
60
PACR
3F ShrtTen ShrtStal StaleOff FIFOlock ClearTO
0
AsyncDM
A
0
61
PCRR
6C
0
0
0
0
0
0
0
PChReset 61
PFCR
31 FIFOres DMAen DMAdir IntEn
RLEen
setTAG
ErrEn DMAbufWe 62
PFEP
39
0
0
6-Bit Binary FIFO Pointer Value
63
PFFP
38
0
0
6-Bit Binary FIFO Pointer Value
63
PFHR1
35
8-Bit Character Data
63
PFHR2
36
8-Bit Character Data
63
PFQR
3A
Data or Space Available in FIFO — Max 0x40
64
PFSR
32
FFfull FFempty Timeout HRtag HRdata
Stale
OneChar DataErr
64
PFTR
3B
0
DMA Transfer Threshold
65
RLCR
37
0
7-Bit Unsigned Binary Count
66
SDTCR
3D
8-Bit Stale Data Timer Count
66
SDTPR
3C
8-Bit Stale Data Timeout Value
67
Table 4. Parallel Port Registers (Sheet 1 of 2)
Name Hex
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EAR
IVR
MDR
NER
NSR
25
8-Bit Binary Value
2E
0
0
0
0
A1284
nInit
HstBsy HstClk
21
8-Bit Binary Data
28
0
RID
0
EPP
RLE
ECP
RVB
RVN
29 NegOK NegFl HostTO Invalid
4-Bit Negotiation Result Code
Page
67
67
68
68
69
20
Datasheet