HYB18T1G400AF Datasheet, PDF (57/89 Pages) Infineon Technologies AG – 1 Gbit DDR2 SDRAM

HYB18T1G400/800/160AF
1Gb DDR2 SDRAM
Active Power-Down Mode Entry and Exit after a Write Command: WL = 2, tWTR = 2, BL = 4
T0
T1
T2
T3
T4
T5
T6
T7
CK, CK
Tn
Tn+1
Tn+2
C M D _{W RITE}
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
V a lid
C om m and
CKE
DQS,
DQS
DQ
tIS
WL + BL/2 + tWTR
WL = RL - 1 = 2
DIN A0 DIN A1 DIN A2 DIN A3
tWTR
tIS
tXARD or
tXARDS *)
Active
Power-Down
Entry
Active
Power-Down
Exit
Act.PD 2
note: Active Power-Down mode exit timing tXARD (“fast exit”) or tXARDS (“slow exit”) depends on the programmed
state in the MRS, address bit A12.
Active Power-Down Mode Entry and Exit after a Write Command with AP: WL = 2, tWR = 3, BL = 4
T0
T1
T2
T3
T4
T5
T6
T7
CK, CK
Tn
Tn+1
Tn+2
CMD
W RITE
w /A P
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
V a lid
C om m and
CKE
DQS,
DQS
WL = RL - 1 = 2
WL + BL/2 + WR
tIS
WR
DQ
DIN A0 DIN A1 DIN A2 DIN A3
tIS
tXARD or
tXARDS *)
Active
Power-Down
Entry
Active
Power-Down
Exit
Act.PD 3
note: Active Power-Down mode exit timing tXARD (“fast exit”) or tXARDS (“slow exit”) depends on the programmed
state in the MRS, address bit A12.WR is the programmed value in the MRS mode register.
Page 57
Rev. 1.02
May 2004
INFINEON Technologies