HYB18T1G400AF Datasheet, PDF (43/89 Pages) Infineon Technologies AG – 1 Gbit DDR2 SDRAM

HYB18T1G400/800/160AF
1Gb DDR2 SDRAM
Examples:
Burst Read Operation Followed by Precharge: RL = 4 (AL = 1, CL = 3), BL = 4, tRTP <= 2 clocks
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK, CK
CMD
DQS,
DQS
DQ
Post CAS
READ A
AL = 1
NOP
NOP
AL + BL/2 clks
CL = 3
RL = 4
P re ch a rg e
> = tR A S
> = tR C
>=tR TP
NOP
tR P
NOP
Bank A
A ctivate
Dout A0 Dout A1 Dout A2 Dout A3
CL = 3
NOP
NOP
Burst Read Operation Followed by Precharge: RL = 4 (AL = 1, CL = 3), BL = 8, tRTP <= 2 clocks
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK, CK
CMD Post CAS
READ A
NOP
NOP
AL + BL/2 clks
NOP
DQS,
DQS
AL = 1
CL = 3
RL = 4
DQ
> = tR A S
> = tR C
NOP
P re c h a rg e
NOP
tR P
NOP
Bank A
A ctivate
Dout A0 Dout A1 Dout A2 Dout A3 Dout A4 Dout A5 Dout A6 Dout A7
CL = 3
>=tR TP
first 4-bit prefetch
second 4-bit prefetch
BR-P413(8)
Page 43
Rev. 1.02
May 2004
INFINEON Technologies