MB86960 Datasheet, PDF (56/65 Pages) Fujitsu Component Limited. – NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE)

MB86960
TEN
t₁₂
t₁₀
TXD
JAM
COL
INT
t_11p/t_11d
Figure 30. Transmit Timing
Table 31. Transmit Timing: Figures 27–30 (for Encoder/Decoder Bypass mode)
Symbol
Description
Min.
t₁
Transmit clock low width
40
t₂
Transmit clock high width
40
t₃
TEN high to TCK low
48
t₄
Transmit data hold
12
t₅
TCK low to TEN low
13
t₆
Transmit interrupt low to transmit enable low
—
t₇
Collision low pulse width
20
t₈
Collision high pulse width
—
t₉
Minimum collision length
520
t₁₀
Jam period ^[1]
—
t_11p
Transmit interrupt when collision at preamble
—
t_11d
Transmit interrupt when collision at data field
—
t₁₂
Collision to first jam bit
4
t₁₃
Transmit data setup
40
1. The 32 jam bits include eight data bits and 24 ‘0’ bits.
Typ.
50
50
—
—
—
1
—
—
—
32
5
16
—
—
Max.
60
60
—
—
—
—
—
200
—
—
—
—
12
—
Units
ns
ns
ns
ns
ns
TCK cycles
ns
ns
ns
TCK cycles
TCK cycles
TCK cycles
TCK cycles
ns