MB86960 Datasheet, PDF (37/65 Pages) Fujitsu Component Limited. – NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE)

MB86960
Skip Packet Register (BMPR14)
Only one bit in this register is active, bit 2, the rest are 0.
Writing 04H to this register commands the buffer
controller to skip the balance of the current receive packet
in memory. The bit can then be read to see when the skip
process is complete (within 300 ns). The bit returns to 0
when the chip is ready to read the next packet, if there is
another packet, or stop reading if there is not. Limitation
of use: Do not use this feature before reading at least four
(4) times from the beginning of the packet, nor if there are
only eight (8) or fewer bytes left of the packet in the
buffer. Doing so may corrupt the receive buffer pointers.
BMPR15 is unused and reserved for possible future
use. Write only 0’s to this register.
TRANSMITTER CIRCUITS
Circuits within the transmitter include a transmitter state
machine, a small FIFO for pipe-lining the packet data,
preamble generator, CRC generator, parallel to serial
converter, backoff generator, inter-packet gap timer and
a time domain reflectometer (TDR) counter.
The transmitter state machine provides sequencing of
events for the transmitter, including idle, preamble, data,
CRC, inter-packet gap, jam and backoff. It detects various
transmit error conditions and sets appropriate bits within
the DLCR registers.
The pipeline FIFO provides elastic buffering that the
buffer controller can load with data to be transmitted.
NICE’s CRC generator calculates the Ethernet 32-bit
CRC on the destination and source address, the length
field and the data field as specified by the ISO/ANSI/
IEEE 8802-3 specification for Ethernet. This value is
appended to the end of the packet.
Transmit Error Processing
NICE has four transmit error status bits in its Transmit
Status Register (DLCR0) for reporting the three possible
transmit errors. The errors are: 1) loss of carrier during
transmission, which usually indicates a medium fault or a
collision, 2) collision, and 3) 16 consecutive collisions.
The latter two can be enabled separately to generate
interrupts.
If NICE detects a collision during transmission, it will
automatically try to retransmit the packet until sixteen at-
tempts have been made. Collision counter DLCR4<7:4>,
automatically increments after each collision up to the
sixteenth collision, at which time it rolls over to zero. (Bit
7 is the most-significant of the four bits.) Appropriate
status bits in the Transmit Status Register and Transmit
Mode Register are set in case of a collision-terminating
transmission. Another status bit (16 COL) indicates that
sixteen consecutive attempts to transmit a packet have
been made and all have been terminated by collision. This
case may indicate a network problem. For example, a
disconnected cable or terminator will produce false
collisions. But 16 collisions can occur normally, although
rarely. A pseudo-random number generator provides the
collision backoff function. This is clocked at the bit rate,
10 MHz, so that distances between stations become part
of the randomizing function. It is sampled at the time of
collision, masking all but the appropriate number of bits
specified by the 8802–3 backoff algorithm. This value is
then counted down at the slot-time rate (512 bits) to
generate the backoff interval. For a first collision, only
one bit is used, giving a backoff of either 51.2
microseconds or 0. For a second consecutive collision,
two bits are used, and so forth, up to ten bits. From the
tenth to the 16th collision, 10 bits are used. This gives a
pseudo-random backoff interval of from 0 to 52.38 ms,
the so-called ‘binary exponential backoff’ for collisions
per 8802-3.
Time Domain Reflectometry
The TDR function provided counts the actual number of
bits transmitted for each packet before an indication of
either collision or carrier loss occurs, or the transmission
completes. If a transmission completes without error
indications, the TDR counter is cleared. See also the
register description for DLCR14 and DLCR15.
Media Access Control
NICE’s transmitter state machine implements the media
access protocol for 8802-3 networks called CSMA/CD,
Carrier Sense, Multiple Access with Collision Detection.
The ‘carrier sense’ part means that the controller
monitors the network for carrier from other nodes, and
defers transmission while other nodes are transmitting
(collision avoidance). But collisions can still occur when
two nodes, perhaps separated on the network by several
microseconds, start to transmit at nearly the same time.
This is handled by the ‘collision detection’ part. All nodes
are required to monitor the network for collisions and,
when involved in one, transmit a 32-bit ‘Jam’ to reinforce
the collision, then terminate transmission. Later, after
waiting a pseudo-random backoff interval, the node
automatically re-attempts to transmit the packet.
Between packets, there must be a gap of at least 9.6
microseconds during which time the trunk cabling is idle.
NICE’s transmitter state machine measures this interval
starting from the end of a packet on the network. It will
not transmit until this interval has expired. During the