MB86960 Datasheet, PDF (12/65 Pages) Fujitsu Component Limited. – NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE)

MB86960
SB/SW
0
0
1
1
BB/BW
0
1
0
1
SYSTEM BUFFER
word
word
word
byte
Do not use
byte
byte
FUNCTIONAL DESCRIPTION
The MB86960 combines the functions of an Ethernet
network controller with packet buffer management, and a
10 Mbit/s Manchester encoder/decoder. It consists of four
major functional blocks: buffer controller, system
interface, transmit controller with Manchester encoder,
and receive controller with Manchester decoder.
The receive and transmit sections of the chip fully
implement the ISO/ANSI/IEEE 8802-3 CSMA/CD
specification for 10 Mbit/sec Ethernet. The transmitter
assembles data packets for transmission and the receiver
disassembles received data packets. Automatic genera-
tion and stripping of the 64-bit preamble, and generation
and checking of the 32-bit CRC are provided on-chip.
Other network functions provided on-chip include
collision resolution by binary exponential backoff and
re-transmission, several modes of address recognition,
error detection and reporting, and serial/parallel and
parallel/serial conversions.
BUFFER CONTROLLER
The MB86960 uses a dedicated buffer memory as shown
in for intermediate storage of data packets to be
transmitted, and of data packets received from the
network. The buffer memory is connected directly to the
controller rather than to a separate local microprocessor
bus, thus eliminating the need for a local microprocessor.
The buffer controller keeps track of buffer memory
partitioning, allocation and updating of all receive and
transmit pointers automatically, thus eliminating this task
from software overhead. As a result of this automation
and its high-performance packet buffering, the NICE
controller can typically win benchmark performance
tests over competing controllers.
Access to the buffer memory is managed by NICE’s
on-chip buffer controller. As required, it updates internal
address pointers for the tasks of transmit, retransmit,
receive, rejection of packets with errors and data transfers
to and from the host. Thus the host is relieved of buffer
management functions, making NICE easy to operate
and substantially reducing software requirements.
Packets with errors, such as CRC errors, are auto–
matically rejected by NICE unless the host asserts the
“accept bad packets” bit. When this bit is asserted, any
packets received with alignment, CRC or short length
errors are passed on to the host processor, and the
appropriate error status bits are set to inform the host of
the error. Similarly, by setting the “accept short packets”
bit, reception of short packets down to 6 bytes in length is
allowed. (Normal operation requires an IEEE minimum
length packet of 60 bytes, excluding preamble and CRC.)