MB86960 Datasheet, PDF (35/65 Pages) Fujitsu Component Limited. – NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE)

MB86960
TRANSMIT AND RECEIVE
PACKET HEADERS
Both transmit and receive packets have headers stored
with them in the buffer memory which are not part of the
transmitted packet. These headers precede the packet
data.
Transmit Packet Length
An 11-bit integer indicating the number of bytes in the
packet to be transmitted, excluding preamble and CRC
fields which are generated by the NICE chip. See Table 3
for bit locations, and description for DLCR7<0>,
M..L/L..M.
Receive Packet Status
The receive packet header consists of one byte of packet
status, an unused byte and two bytes (11 bits) for packet
length in bytes. See Table 3 for location of the bits, and
description for DLCR7<0>, M..L/L..M. Bits 1, 2, 3 and 4
of the status byte are an image of the same bits in the
Receive Status Register, DLCR1, with respect to the
packet that follows. Bit 5 is the GOOD PKT bit. A 1 in
this bit location indicates no errors were detected in the
packet. Bits 0, 6 and 7 are unused and are always 0.
Receive Packet Length
The third and fourth bytes of the receive packet header
indicate the total number of bytes in the stored packet
data. See Table 3 for location of the bits, and description
for DLCR7<0>, M..L/L..M.
BUFFER MEMORY PORT REGISTERS
The Buffer Memory Port Registers, BMPR8–15, provide
the host access to the buffer memory and certain control
functions. It is recommended that this bank be selected
most of the time the chip is on the network for
convenience in accessing the buffer memory and the
control bits (Register Bank Select = 11 binary). Refer to
Table 1 for location of these registers.
Writing a byte/word to BMPR8, the buffer port, transfers
that data to the currently addressed location in the
transmit buffer and increments the transmit buffer
pointer to point to the next byte/word. Reading a
byte/word from this port transfers the contents of the
currently-addressed location in the receive buffer to the
host and increments the receive buffer pointer to point to
the next byte/word. BMPR9 is used only in word mode as
the high byte of the word. In word mode, all transfers
must be 16-bits wide, as the Buffer Port does not support
byte-wide transfers in this mode. All other registers can be
accessed word-wide, high byte only or low byte only as
desired.
Table 14. BMPR10 — Transmit Start Register
BIT SYMBOL TYPE
DESCRIPTION
7 TX START W TRANSMITTER START: Writing 1 to this bit commands transmitter to start transmitting the
0 packet(s) loaded into the transmit buffer. Before doing so, the transmitter must be idle (not
busy with another buffer). The TX DONE bit is used to determine the required transmitter
status, idle or busy.
6–0 TX PKT
CNT
R TRANSMIT PACKET COUNT: A binary integer written by the system to indicate the number
W of packets contained in the transmit buffer for transmission. This information can be loaded at
0 the same time the TX START bit is set high. As the transmitter finishes transmitting each
packet, this counter is decremented. The value can be read by the system to see how many
packets remain to be transmitted.