MB86960 Datasheet, PDF (21/65 Pages) Fujitsu Component Limited. – NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE)

MB86960
Table 2. Summary of Control and Status Bits: DLCR0-7, BMPR8-15
Register
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
TX STATUS
DLCR0
TX DONE NET BSY TX-RX CR LOST
0
RX STATUS
DLCR1
RX PKT BUS RD DMA EOP RMT
ERR
0900H
SHORT
ERR
TX INT ENABLE INT EN
0
0
0
0
DLCR2
RX INT ENABLE
DLCR3
INT EN
INT EN
INT EN
INT EN
INT EN
TX MODE
DLCR 4
COL CTR COL CTR COL CTR COL CTR
0
3
2
1
0
RX MODE
DLCR5
CONFIG0
DLCR6
0
RX BUF ACPT
40 BIT
EMPTY BAD PKTS ADDR
DLC EN
1
SB/SW BB/BW
ACPT
SHORT
PKTS
TBS 1
CONFIG1
DLCR7
E/D CNF 1 E/D CNF 0 PWRDN RDYPOL RBS 1
BUF MEM PORT
7
6
5
4
3
BMPR8
BUF MEM PORT
15
14
13
12
11
BMPR9
TX START
BMPR10
TX
START
TX PKT
CNT 6
TX PKT
CNT 5
TX PKT
CNT 4
TX PKT
CNT 3
16 COLLISIONS
0
0
0
0
0
BMPR11
DMA ENABLE
0
0
0
0
0
BMPR12
DMA BURST
0
0
0
0
0
BMPR13
SKIP PACKET
0
0
0
0
0
BMPR14
RESERVED
BMPR15
0
0
0
0
0
BIT 2
COL
BIT 1
16 COL
BIT 0
0
ALIGN
ERR
INT EN
CRC
ERR
INT EN
RX BUF
OVERFLO
0
INT EN INT EN INT EN
CNTRL
LBC
EN TX
DEFER
1
AF1
AF0
TBS 0
BS 1
BS 0
RBS 0 EOPPOL
2
1
M..L/
L..M
0
10
9
8
TX PKT
CNT 2
TX PKT
CNT 1
TX PKT
CNT 0
16 COL 16 COL 16 COL
CNTRL 2 CNTRL 1 CNTRL 0
0
RX DMA TX DMA
ENABLE ENABLE
0
BURST 1 BURST 0
SKIP
0
0
PKT
0
0
0