English
Language : 

MB86960 Datasheet, PDF (30/65 Pages) Fujitsu Component Limited. – NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE)
MB86960
Table 13. DLCR7 — Configuration Register 1
BIT SYMBOL TYPE
DESCRIPTION
7, 6
E/D
CNF
1,0
R ENCODER/DECODER CONFIGURATION: Selects the operating mode of the
W controller-encoder/decoder functions and their interface. See table below and pin
00 descriptions for the monitor pins, TXD, TCK, TEN, LBC, RXD, RCK, CRS and COL:
E/D CNF 1
0
E/D CNF 0
0
0
1
1
0
1
1
Registers
Normal NICE: Internal encoder/decoder active.
Monitor pins inactive.
NICE + Monitor: Internal encoder/decoder active.
Monitor pins outputting all controller/encoder/
decoder interface signals
Encoder/Decoder Bypass: Internal encoder/
decoder not used. Monitor pins can be used to
interface controller to external encoder/decoder.
Encoder/Decoder Test: Controller inactive,
encoder/decoder active. Monitor pins used to test
encoder/decoder.
5
PWRDN
4
RDYPOL
3, 2 RBS 1, 0
R POWER DOWN: When set high, enables power to the chip for all functions; when set low,
W places chip in power down mode for power conservation.
1
R READY PIN POLARITY: Reads the state of the RDY POL pin 94.
0/1
R REGISTER BANK SELECT: Provides the indirect address for selection of one of the three
W sets of registers to access when the physical register address is xxx8H–xxxFH.
00 The lower 7 registers are not bank-selectable. See table:
RBS1
0
0
1
1
RBS0
0
1
0
1
Registers
DLCR0-7, DLCR8-F
DLCR0-7, HT8-F
DLCR0-7, BMR8-F
RESERVED
1
EOPPOL
R EOP PIN SIGNAL POLARITY: When high, the EOP pin is active-high; when low, EOP is
W active-low.
0
0
M..L/
R BYTE ORDER CONTROL: Selects byte lane ordering for packet data in the buffer (applies
L..M
W only in System Word Mode). In both Most..Least and Least..Most modes, the first and second
0 bytes of the packet will appear in the same word on the system bus. When this bit is high (M..L
mode), the first and all odd-numbered bytes of a packet and its header will appear on the high
byte of the system bus. Note that header bytes are also swapped.