MB86960 Datasheet, PDF (17/65 Pages) Fujitsu Component Limited. – NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE)

MB86960
Receiver Access to Buffer
Once initialized and enabled, the receiver will automati-
cally load any error-free incoming packets which pass the
address filter into the receive buffer through an on-chip
FIFO, appending a four-byte header to the front end
which provides packet length and status. An interrupt can
be provided to alert the host processor that a packet is
available in the buffer. The host processor can read out
receive packets as they become available. Continuous
reception can continue as long as the receive buffer does
not become full. If the host processor reads the receive
packets from the buffer promptly, the buffer will not fill
up. But if overflow does occur, an interrupt will be
generated to indicate the problem. If this occurs, data
should be read from the buffer to free space. As soon as
space becomes available in the receive buffer, the
receiver will automatically continue reception.
The receive buffer size can vary between a maximum of
62 kilobytes when 2 kilobytes is allocated for the transmit
section and maximum memory size of 64 kilobytes is
used, to a minimum of 4 kilobytes if 4 kilobytes is
allocated for the transmit section and minimum memory
size of 8 kilobytes is used. The receive section
dynamically allocates space for each individual
incoming data packet along an eight-byte “page”
boundary. Each received packet is preceded by a four
byte header which provides packet status and the length
of that data packet. The data packets are linked or
“chained” by internal pointers which use the length value
in the packet header to calculate the length of the packet,
and the starting address of the next packet. This buffer
format is shown in Figure 9. Since NICE controls its
dedicated buffer memory, FIFO size and depth are
unimportant in this architecture, and need not be
considered in system timing considerations.
A status bit in one of NICE’s internal registers (RX BUF
EMPTY) informs the host when one or more packets are
resident in the receive buffer and available to be read.
The host retrieves these packets from the buffer memory
by successive reads of BMPR8. Once a data byte/word is
read from the buffer memory, internal pointers are
advanced to the next byte/word. As data is thus read by
the system, that memory becomes available for reception
of new packets. NICE automatically rejects an incoming
packet if there is not enough buffer space to fully receive
that packet. Therefore, there is no chance for packets
already received to be “overrun” by incoming packets.
When DLCR5<5>, the ACPT BAD PKTS (“accept bad
packets”) bit is set to a “0” (disabled), a bad incoming
packet causes NICE to release buffer space in which that
packet is contained and reset its internal pointers so as to
use that space for the next incoming packet. If this bit is
set to a “1”, the packet with a short length, alignment or
CRC error will be accepted and the appropriate error bits
in the status field of its header will be set. The same
applies to DLCR5<3>, ACPT SHORT PKTS, which
when high allows retention of packets below 60 bytes in
length, excluding preamble and CRC (shorter than IEEE
802.3 minimum size).
DATA
STATUS
RESERVED
LENGTH LSB
LENGTH MSB
DATA
STATUS
RESERVED
LENGTH LSB
LENGTH MSB
DATA
UNUSED BUFFER
AREA
STATUS
RESERVED
LENGTH LSB
LENGTH MSB
DATA
PACKET n1
PACKET n
Figure 9. Receive Buffer Detail