MC9S08LC60 Datasheet, PDF (92/358 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 6 Parallel Input/Output
strength for the associated pins and may be used in conjunction with the peripheral functions on these pins
for most modules.
The pins associated with Port C are controlled by the registers in this section. These registers control the
pin pullup, slew rate and drive strength of the Port C pins independent of the parallel I/O registers.
6.2.6.1 Internal Pullup Enable (PTCPE)
An internal pullup device can be enabled for each port pin by setting the corresponding bit in the pullup
enable register (PTCPEn). The pullup device is disabled if the pin is configured as an output by the parallel
I/O control logic or any shared peripheral function regardless of the state of the corresponding pullup
enable register bit. The pullup device is also disabled if the pin is controlled by an analog function.
7
R
PTCPE7¹
W
6
PTCPE6²
5
PTCPE5
4
PTCPE4
3
PTCPE3
2
PTCPE2
Reset
0
0
0
0
0
0
Figure 6-23. Pullup Enable for Port C (PTCPE)
1 _{PTCPE7 has no effect on the output-only PTC7 pin.}
2 _{PTCPE6 has no effect on the output-only PTC6 pin.}
1
PTCPE1
0
0
PTCPE0
0
Table 6-13. PTCPE Field Descriptions
Field
Description
7:0
PTCPE[7:0]
Pullup Enable for Port C Bits — For port C pins that are inputs, these read/write control bits determine whether
internal pullup devices are enabled provided the corresponding PTCDDn is 0. For port C pins that are configured
as outputs, these bits are ignored and the internal pullup devices are disabled. When bits 4, 5, or 7 of port C are
enabled as KBI inputs and are configured to detect rising edges/high levels, the pullup enable bits enable
pulldown rather than pullup devices.
0 Internal pullup device disabled.
1 Internal pullup device enabled.
MC9S08LC60 Series Advance Information Data Sheet, Rev. 2
92
PRELIMINARY
Freescale Semiconductor