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MC9S08LC60 Datasheet, PDF (156/358 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Liquid Crystal Display Driver (S08LCDV1)
9.5.1 Initialization Sequence
The list below provides a recommended initialization sequence for the LCD module.
1. LCDCLKS register
a) Conï¬gure LCD clock source (SOURCE bit)
b) Adjust the clock source to achieve a value for LCDCLK of ~ 32 kHz (CLKADJ[5:0] & DIV16)
2. LCDSUPPLY register
a) Enable charge pump (LCDCPEN bit)
b) Conï¬gure the LCD module for doubler or tripler mode (LCDCPMS bit)
c) Conï¬gure charge pump clock (CPCADJ[1:0])
d) Conï¬gure HDRVBUF
e) Conï¬gure op amp switch (BBYPASS bit)
f) Conï¬gure LCD power supply (VSUPPLY[1:0])
3. LCDCR1 register
a) Conï¬gure the LCD frame frequency interrupt (LCDIEN bit)
b) Conï¬gure LCD behavior in low power mode (LCDWAI and LCDSTP3 bits)
4. LCDCR0 register
a) Conï¬gure LCD duty cycle (DUTY[1:0])
b) Conï¬gure LPWAVE
c) Select and conï¬gure the LCD frame frequency (LCLK[2:0])
5. LCDBCTL register
a) Conï¬gure the blink mode to blink individual or blink all segments (BLKMODE bit)
b) Conï¬gure the blink frequency (BRATE[2:0])
6. FPENR[5:0] register
a) Enable the LCD module frontplane waveform output (FP[40:0]EN bits)
7. LCDCR0 register
a) Enable the LCD module (LCDEN bit)
MC9S08LC60 Series Advance Information Data Sheet, Rev. 2
156
PRELIMINARY
Freescale Semiconductor
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