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MC9S08LC60 Datasheet, PDF (156/358 Pages) Freescale Semiconductor, Inc – Microcontrollers
Liquid Crystal Display Driver (S08LCDV1)
9.5.1 Initialization Sequence
The list below provides a recommended initialization sequence for the LCD module.
1. LCDCLKS register
a) Configure LCD clock source (SOURCE bit)
b) Adjust the clock source to achieve a value for LCDCLK of ~ 32 kHz (CLKADJ[5:0] & DIV16)
2. LCDSUPPLY register
a) Enable charge pump (LCDCPEN bit)
b) Configure the LCD module for doubler or tripler mode (LCDCPMS bit)
c) Configure charge pump clock (CPCADJ[1:0])
d) Configure HDRVBUF
e) Configure op amp switch (BBYPASS bit)
f) Configure LCD power supply (VSUPPLY[1:0])
3. LCDCR1 register
a) Configure the LCD frame frequency interrupt (LCDIEN bit)
b) Configure LCD behavior in low power mode (LCDWAI and LCDSTP3 bits)
4. LCDCR0 register
a) Configure LCD duty cycle (DUTY[1:0])
b) Configure LPWAVE
c) Select and configure the LCD frame frequency (LCLK[2:0])
5. LCDBCTL register
a) Configure the blink mode to blink individual or blink all segments (BLKMODE bit)
b) Configure the blink frequency (BRATE[2:0])
6. FPENR[5:0] register
a) Enable the LCD module frontplane waveform output (FP[40:0]EN bits)
7. LCDCR0 register
a) Enable the LCD module (LCDEN bit)
MC9S08LC60 Series Advance Information Data Sheet, Rev. 2
156
PRELIMINARY
Freescale Semiconductor