MC9S08LC60 Datasheet, PDF (12/358 Pages) Freescale Semiconductor, Inc – Microcontrollers

Section Number
Title
Page
7.2 External Signal Description ............................................................................................................98
7.3 Register Definition ..........................................................................................................................99
7.3.1 KBIx Status and Control Register (KBIxSC) .................................................................99
7.3.2 KBIx Pin Enable Register (KBIxPE) .............................................................................99
7.3.3 KBIx Edge Select Register (KBIxES) ..........................................................................100
7.4 Functional Description ..................................................................................................................100
7.4.1 Edge Only Sensitivity ...................................................................................................101
7.4.2 Edge and Level Sensitivity ...........................................................................................101
7.4.3 KBI Pullup/Pulldown Resistors ....................................................................................101
7.4.4 KBI Initialization ..........................................................................................................101
Chapter 8
Central Processor Unit (S08CPUV2)
8.1 Introduction ...................................................................................................................................103
8.1.1 Features .........................................................................................................................103
8.2 Programmer’s Model and CPU Registers .....................................................................................104
8.2.1 Accumulator (A) ...........................................................................................................104
8.2.2 Index Register (H:X) ....................................................................................................104
8.2.3 Stack Pointer (SP) .........................................................................................................105
8.2.4 Program Counter (PC) ..................................................................................................105
8.2.5 Condition Code Register (CCR) ...................................................................................105
8.3 Addressing Modes .........................................................................................................................107
8.3.1 Inherent Addressing Mode (INH) ................................................................................107
8.3.2 Relative Addressing Mode (REL) ................................................................................107
8.3.3 Immediate Addressing Mode (IMM) ...........................................................................107
8.3.4 Direct Addressing Mode (DIR) ....................................................................................107
8.3.5 Extended Addressing Mode (EXT) ..............................................................................108
8.3.6 Indexed Addressing Mode ............................................................................................108
8.3.6.1 Indexed, No Offset (IX) ................................................................................108
8.3.6.2 Indexed, No Offset with Post Increment (IX+) .............................................108
8.3.6.3 Indexed, 8-Bit Offset (IX1) ...........................................................................108
8.3.6.4 Indexed, 8-Bit Offset with Post Increment (IX1+) .......................................108
8.3.6.5 Indexed, 16-Bit Offset (IX2) .........................................................................108
8.3.6.6 SP-Relative, 8-Bit Offset (SP1) ....................................................................108
8.3.6.7 SP-Relative, 16-Bit Offset (SP2) ..................................................................109
8.4 Special Operations .........................................................................................................................109
8.4.1 Reset Sequence .............................................................................................................109
8.4.2 Interrupt Sequence ........................................................................................................109
8.4.3 Wait Mode Operation ...................................................................................................110
8.4.4 Stop Mode Operation ...................................................................................................110
8.4.5 BGND Instruction ........................................................................................................111
8.5 HCS08 Instruction Set Summary ..................................................................................................112
MC9S08LC60 Series Advance Information Data Sheet, Rev. 2
12
Freescale Semiconductor
PRELIMINARY