MC9S08LC60 Datasheet, PDF (14/358 Pages) Freescale Semiconductor, Inc – Microcontrollers

Section Number
Title
Page
9.5.2.1 Initialization Example 1 ................................................................................158
9.5.2.2 Initialization Example 2 ................................................................................159
9.5.2.3 Initialization Example 3 ................................................................................161
9.5.2.4 Initialization Example 4 ................................................................................162
9.6 Application Information ................................................................................................................163
9.6.1 LCD Seven Segment Example Description ..................................................................163
9.6.1.1 LCD Module Waveforms ..............................................................................165
9.6.1.2 Segment On Driving Waveform ....................................................................166
9.6.1.3 Segment Off Driving Waveform ...................................................................166
9.6.2 LCD Contrast Control ..................................................................................................166
9.6.3 LCD Power Consumption ............................................................................................167
Chapter 10
Internal Clock Generator (S08ICGV4)
10.1 Introduction ...................................................................................................................................169
10.2 Introduction ...................................................................................................................................171
10.2.1 Features .........................................................................................................................171
10.2.2 Modes of Operation ......................................................................................................172
10.2.3 Block Diagram ..............................................................................................................173
10.3 External Signal Description ..........................................................................................................173
10.3.1 EXTAL — External Reference Clock / Oscillator Input ..............................................173
10.3.2 XTAL — Oscillator Output ..........................................................................................173
10.3.3 External Clock Connections .........................................................................................174
10.3.4 External Crystal/Resonator Connections ......................................................................174
10.4 Register Definition ........................................................................................................................175
10.4.1 ICG Control Register 1 (ICGC1) .................................................................................175
10.4.2 ICG Control Register 2 (ICGC2) .................................................................................177
10.4.3 ICG Status Register 1 (ICGS1) ....................................................................................178
10.4.4 ICG Status Register 2 (ICGS2) ....................................................................................179
10.4.5 ICG Filter Registers (ICGFLTU, ICGFLTL) ...............................................................179
10.4.6 ICG Trim Register (ICGTRM) .....................................................................................180
10.5 Functional Description ..................................................................................................................180
10.5.1 Off Mode (Off) .............................................................................................................181
10.5.1.1 BDM Active ..................................................................................................181
10.5.1.2 OSCSTEN Bit Set .........................................................................................181
10.5.1.3 Stop/Off Mode Recovery ..............................................................................181
10.5.2 Self-Clocked Mode (SCM) ...........................................................................................181
10.5.3 FLL Engaged, Internal Clock (FEI) Mode ...................................................................182
10.5.4 FLL Engaged Internal Unlocked ..................................................................................183
10.5.5 FLL Engaged Internal Locked ......................................................................................183
10.5.6 FLL Bypassed, External Clock (FBE) Mode ...............................................................183
10.5.7 FLL Engaged, External Clock (FEE) Mode .................................................................183
10.5.7.1 FLL Engaged External Unlocked .................................................................184
10.5.7.2 FLL Engaged External Locked .....................................................................184
MC9S08LC60 Series Advance Information Data Sheet, Rev. 2
14
Freescale Semiconductor
PRELIMINARY