MC9S08LC60 Datasheet, PDF (79/358 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 5 Resets, Interrupts, and System Configuration
5.8.10 System Power Management Status and Control 3 Register (SPMSC3)
This register is used to report the status of the low voltage warning function behavior of the MCU.
7
6
5
4
3
2
1
0
R LVWF
0
0
0
0
0
LVDV
LVWV
W
LVWACK
Power-on reset
0⁽¹⁾
0
0
0
0
0
0
0
(POR):
LVD reset
0⁽¹⁾
0
u
u
0
0
0
0
(LVR):
Any other
0⁽¹⁾
0
u
u
0
0
0
0
reset:
= Unimplemented or Reserved
u = Unaffected by reset
1 _{LVWF will be set in the case when VSupply transitions below the trip point or after reset and VSupply is already below VLVW.}
Figure 5-12. System Power Management Status and Control 3 Register (SPMSC3)
Table 5-14. SPMSC3 Field Descriptions
Field
Description
7
LVWF
6
LVWACK
5
LVDV
4
LVWV
Low-Voltage Warning Flag — The LVWF bit indicates the low voltage warning status.
0 Low voltage warning not present.
1 Low voltage warning is present or was present.
Low-Voltage Warning Acknowledge — The LVWACK bit is the low-voltage warning acknowledge. Writing a 1
to LVWACK clears LVWF to 0 if a low voltage warning is not present.
Low-Voltage Detect Voltage Select — The LVDV bit selects the LVD trip point voltage (V_LVD).
0 Low trip point selected (V_LVD = V_LVDL).
1 High trip point selected (V_LVD = V_LVDH).
Low-Voltage Warning Voltage Select — The LVWV bit selects the LVW trip point voltage (V_LVW).
0 Low trip point selected (V_LVW = V_LVWL).
1 High trip point selected (V_LVW = V_LVWH).
MC9S08LC60 Series Advance Information Data Sheet, Rev. 2
Freescale Semiconductor
PRELIMINARY
79