MC68HC908GR8A_07 Datasheet, PDF (76/260 Pages) Freescale Semiconductor, Inc – Microcontrollers

Configuration Register (CONFIG)
Address: $001F
Bit 7
6
5
4
Read:
COPRS
Write:
LVISTOP LVIRSTD LVIPWRD
Reset:
0
0
0
0
Note: LVI5OR3 bit is only reset via POR (power-on reset).
3
LVI5OR3
See note
2
SSREC
0
1
STOP
0
Figure 5-2. Configuration Register 1 (CONFIG1)
Bit 0
COPD
0
OSCSTOPENB — Oscillator Stop Mode Enable Bar Bit
OSCSTOPENB, when set, will enable the oscillator to continue to generate clocks in stop mode. See
Chapter 4 Clock Generator Module (CGM). This function is used to keep the timebase running while
the rest of the MCU stops. See Chapter 16 Timebase Module (TBM). When clear, the oscillator will
cease to generate clocks while in stop mode. The default state for this option is clear, disabling the
oscillator in stop mode.
1 = Oscillator enabled to operate during stop mode
0 = Oscillator disabled during stop mode (default)
SCIBDSRC — SCI Baud Rate Clock Source Bit
SCIBDSRC controls the clock source used for the serial communications interface (SCI). The setting
of this bit affects the frequency at which the SCI operates.See Chapter 13 Serial Communications
Interface (SCI) Module.
1 = Internal bus clock used as clock source for SCI
0 = External oscillator used as clock source for SCI
COPRS — COP Rate Select Bit
COPRS selects the COP timeout period. Reset clears COPRS. See Chapter 6 Computer Operating
Properly (COP) Module
1 = COP timeout period = 8176 CGMXCLK cycles
0 = COP timeout period = 262,128 CGMXCLK cycles
LVISTOP — LVI Enable in Stop Mode Bit
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the LVI to operate during stop mode.
Reset clears LVISTOP.
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
LVIRSTD — LVI Reset Disable Bit
LVIRSTD disables the reset signal from the LVI module. See Chapter 11 Low-Voltage Inhibit (LVI).
1 = LVI module resets disabled
0 = LVI module resets enabled
LVIPWRD — LVI Power Disable Bit
LVIPWRD disables the LVI module. See Chapter 11 Low-Voltage Inhibit (LVI).
1 = LVI module power disabled
0 = LVI module power enabled
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
76
Freescale Semiconductor