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MC68HC908GR8A_07 Datasheet, PDF (52/260 Pages) Freescale Semiconductor, Inc – Microcontrollers
Analog-to-Digital Converter (ADC)
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end of a conversion. It
always reads as a 0.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled (AIEN = 1)
NOTE
The write function of the COCO bit is reserved. When writing to the ADSCR
register, always have a 0 in the COCO bit position.
AIEN — ADC Interrupt Enable Bit
When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is
cleared when the data register is read or the status/control register is written. Reset clears the AIEN bit.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
ADCO — ADC Continuous Conversion Bit
When set, the ADC will convert samples continuously and update the ADR register at the end of each
conversion. Only one conversion is completed between writes to the ADSCR when this bit is cleared.
Reset clears the ADCO bit.
1 = Continuous ADC conversion
0 = One ADC conversion
ADCH4–ADCH0 — ADC Channel Select Bits
ADCH4–ADCH0 form a 5-bit field which is used to select one of 16 ADC channels. Only six channels,
AD5–AD0, are available on this MCU. The channels are detailed in Table 3-1. Care should be taken
when using a port pin as both an analog and digital input simultaneously to prevent switching noise
from corrupting the analog signal. See Table 3-1.
The ADC subsystem is turned off when the channel select bits are all set to 1. This feature allows for
reduced power consumption for the MCU when the ADC is not being used.
NOTE
Recovery from the disabled state requires one conversion cycle to stabilize.
The voltage levels supplied from internal reference nodes, as specified in Table 3-1, are used to verify
the operation of the ADC converter both in production test and for user applications.
Table 3-1. Mux Channel Select(1)
ADCH4
0
0
0
0
0
0
0
↓
1
1
1
1
ADCH3
0
0
0
0
0
0
0
↓
1
1
1
1
ADCH2
0
0
0
0
1
1
1
↓
1
1
1
1
ADCH1
0
0
1
1
0
0
1
↓
0
0
1
1
ADCH0
0
1
0
1
0
1
0
↓
0
1
0
1
Input Select
PTB0/KBD0
PTB1/AD1
PTB1/AD2
PTB2/AD3
PTB4/AD4
PTB5/AD5
Reserved
VREFH
VREFL
ADC power off
1. If any unused channels are selected, the resulting ADC conversion will be unknown or
reserved.
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
52
Freescale Semiconductor