MC68HC908GR8A_07 Datasheet, PDF (60/260 Pages) Freescale Semiconductor, Inc – Microcontrollers

Clock Generator Module (CGM)
4. Select a VCO frequency multiplier, N.
N
=
r
o
un
⎛
d⎜
⎝
R------×_{-----ff--VR----CC---L-L--K-K---D----E---S--⎠⎟⎞}
5. If N is < N_max, use P = 0. If N > N_max, choose P using this table:
Then recalculate N:
Current N Value
P
0 < N ≤ Nmax
0
Nmax < N ≤ Nmax × 2
1
Nmax × 2 < N ≤ Nmax × 4
2
Nmax × 4 < N ≤ Nmax × 8
3
N
=
ro
un
⎛
d⎜
⎝
-R----f-^×-_R---_C-f--^V-_L---^CK---^L--_×-^K----2^D---_P-^E---^S--_{⎠⎟⎞}
6. Calculate and verify the adequacy of the VCO and bus frequencies f_VCLK and f_BUS.
fVCLK = (2P × N ⁄ R) × fRCLK
fBUS = (fVCLK) ⁄ 4
7. Select the VCO’s power-of-two range multiplier E, according to this table:
Frequency Range
E
0 < f_VCLK < 8MHz
0
8MHz ≤ f_VCLK < 16MHz
1
16MHz ≤ f_VCLK < 32MHz
2
NOTE: Do not program E to a value of 3.
8. Select a VCO linear range multiplier, L, where f_NOM = 38.4 kHz
L
=
r
ou
⎛
nd⎜
⎝
2----^E--f--V-×^---C--f-_NL^---K-_O^----_M^{---⎠⎟⎞}
9. Calculate and verify the adequacy of the VCO programmed center-of-range frequency, f_VRS. The
center-of-range frequency is the midpoint between the minimum and maximum frequencies
attainable by the PLL.
f_VRS = (L × 2^E)f_NOM
For proper operation,
f_VRS – f_VCLK
≤ -^f-^N----^O----^M------^×-----²---^E--
2
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
60
Freescale Semiconductor