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MC68HC908GR8A_07 Datasheet, PDF (115/260 Pages) Freescale Semiconductor, Inc – Microcontrollers
Chapter 12
Input/Output (I/O) Ports
12.1 Introduction
Bidirectional input-output (I/O) pins form five parallel ports. All I/O pins are programmable as inputs or
outputs. All individual bits within port A, port C, and port D are software configurable with pullup devices
if configured as input port bits. The pullup devices are automatically and dynamically disabled when a port
bit is switched to output mode.
NOTE
Connect any unused I/O pins to an appropriate logic level, either VDD or
VSS. Although the I/O ports do not require termination for proper operation,
termination reduces excess current consumption and the possibility of
electrostatic damage.
Not all port pins are bonded out in all packages. Care sure be taken to make
any unbonded port pins an output to prevent them from being floating
inputs.
Addr.
$0000
$0001
$0002
$0003
$0004
Register Name
Bit 7
6
5
4
3
Port A Data Register Read:
0
0
0
0
PTA3
(PTA) Write:
See page 117. Reset:
Unaffected by reset
Port B Data Register Read:
0
(PTB) Write:
See page 120. Reset:
0
PTB5
PTB4
PTB3
Unaffected by reset
Port C Data Register Read:
0
0
0
0
0
(PTC) Write:
See page 122. Reset:
Unaffected by reset
Port D Data Register Read:
0
(PTD) Write:
See page 124. Reset:
PTD6
PTD5
PTD4
PTD3
Unaffected by reset
Data Direction Register A Read:
0
0
0
0
DDRA3
(DDRA) Write:
See page 118. Reset:
0
0
0
0
0
= Unimplemented
Figure 12-1. I/O Port Register Summary
2
PTA2
PTB2
0
PTD2
DDRA2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Freescale Semiconductor
115