MC68HC908GR8A_07 Datasheet, PDF (201/260 Pages) Freescale Semiconductor, Inc – Microcontrollers

Features
17.2 Features
Features of the TIM include:
• Three input capture/output compare channels:
– Rising-edge, falling-edge, or any-edge input capture trigger
– Set, clear, or toggle output compare action
• Buffered and unbuffered pulse-width-modulation (PWM) signal generation
• Programmable TIM clock input with 7-frequency internal bus clock prescaler selection
• Free-running or modulo up-count operation
• Toggle any channel pin on overflow
• TIM counter stop and reset bits
17.3 Pin Name Conventions
The text that follows describes both timers, TIM1 and TIM2. The TIM input/output (I/O) pin names are
T[1,2]CH0 (timer channel 0) and T[1,2]CH1 (timer channel 1), where “1” is used to indicate TIM1 and “2” is
used to indicate TIM2. The two TIMs share three I/O pins with three port D I/O port pins. The full names
of the TIM I/O pins are listed in Table 17-1. The generic pin names appear in the text that follows.
Table 17-1. Pin Name Conventions
TIM Generic Pin Names:
Full TIM Pin Names:
TIM1
TIM2
T[1,2]CH0
PTD4/T1CH0
PTD6/T2CH0
T[1,2]CH1
PTD5/T1CH1
—
NOTE
References to either timer 1 or timer 2 may be made in the following text by
omitting the timer number. For example, TCH0 may refer generically to
T1CH0 and T2CH0.
17.4 Functional Description
Figure 17-1 shows the structure of the TIM. The central component of the TIM is the 16-bit TIM counter
that can operate as a free-running counter or a modulo up-counter. The TIM counter provides the timing
reference for the input capture and output compare functions. The TIM counter modulo registers,
TMODH:TMODL, control the modulo value of the TIM counter. Software can read the TIM counter value
at any time without affecting the counting sequence.
The two TIM channels (per timer) are programmable independently as input capture or output compare
channels. If a channel is configured as input capture, then an internal pullup device may be enabled for
that channel. See 12.5.3 Port D Input Pullup Enable Register.
Figure 17-3 summarizes the timer registers.
NOTE
References to either timer 1 or timer 2 may be made in the following text by
omitting the timer number. For example, TSC may generically refer to both
T1SC and T2SC.
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Freescale Semiconductor
201