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MC68HC908GR8A_07 Datasheet, PDF (101/260 Pages) Freescale Semiconductor, Inc – Microcontrollers
INTERNAL BUS
Functional Description
KBD0
VECTOR FETCH
DECODER
ACKK
RESET
TO PULLUP ENABLE
.
.
KBIE0
.
KBD3
VDD
CLR
D
Q
CK
KEYF
SYNCHRONIZER
IMASKK
KEYBOARD
INTERRUPT
REQUEST
TO PULLUP ENABLE
KBIE3
MODEK
Figure 9-2. Keyboard Module Block Diagram
Addr.
$001A
$001B
Register Name
Bit 7
Keyboard Status Read: 0
and Control Register Write:
(INTKBSCR)
See page 103. Reset: 0
Keyboard Interrupt Enable Read:
Register Write:
(INTKBIER)
See page 104. Reset: 0
6
5
0
0
0
0
0
0
= Unimplemented
4
3
0
KEYF
0
0
KBIE3
0
0
Figure 9-3. I/O Register Summary
2
0
ACKK
0
1
Bit 0
IMASKK MODEK
0
0
KBIE2 KBIE1 KBIE0
0
0
0
If the MODEK bit is set, the keyboard interrupt pins are both falling edge- and low-level sensitive, and both
of the following actions must occur to clear a keyboard interrupt request:
• Vector fetch or software clear — A vector fetch generates an interrupt acknowledge signal to clear
the interrupt request. Software may generate the interrupt acknowledge signal by writing a 1 to the
ACKK bit in the keyboard status and control register (INTKBSCR). The ACKK bit is useful in
applications that poll the keyboard interrupt pins and require software to clear the keyboard
interrupt request. Writing to the ACKK bit prior to leaving an interrupt service routine can also
prevent spurious interrupts due to noise. Setting ACKK does not affect subsequent transitions on
the keyboard interrupt pins. A falling edge that occurs after writing to the ACKK bit latches another
interrupt request. If the keyboard interrupt mask bit, IMASKK, is clear, the CPU loads the program
counter with the vector address at locations $FFE0 and $FFE1.
• Return of all enabled keyboard interrupt pins to a high level — As long as any enabled keyboard
interrupt pin is low, the keyboard interrupt remains set.
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Freescale Semiconductor
101