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MC68HC908GR8A_07 Datasheet, PDF (35/260 Pages) Freescale Semiconductor, Inc – Microcontrollers
Input/Output (I/O) Section
Addr.
Register Name
$003A
PLL VCO Select Range Read:
Register (PMRS) Write:
See page 69. Reset:
PLL Reference Divider Select Read:
$003B
Register (PMDS) Write:
See page 70. Reset:
$003C
ADC Status and Control Read:
Register (ADSCR) Write:
See page 51. Reset:
$003D
ADC Data Register Read:
(ADR) Write:
See page 53. Reset:
$003E
ADC Clock Register Read:
(ADCLK) Write:
See page 53. Reset:
$003F
Reserved
Bit 7
VRS7
0
0
0
COCO
R
0
AD7
ADIV2
0
R
6
VRS6
1
0
0
AIEN
0
AD6
ADIV1
0
R
5
4
3
2
1
Bit 0
VRS5
VRS4
VRS3
VRS2
VRS1
VRS0
0
0
0
0
0
0
0
0
RDS3
RDS2
RDS1
RDS0
0
0
0
0
0
1
ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
0
1
1
1
1
1
AD5
AD4
A3
AD2
AD1
AD0
Unaffected by reset
0
0
0
0
ADIV0 ADICLK
0
0
0
0
0
0
R
R
R
R
R
R
SIM Break Status Register Read:
R
R
R
R
R
SBSW
R
R
$FE00
(SBSR) Write:
(Note 1)
See page 220. Reset:
0
0
0
0
0
0
0
0
1. Writing a 0 clears SBSW.
SIM Reset Status Register Read: POR
PIN
COP
ILOP
ILAD MODRST LVI
0
$FE01
(SRSR) Write:
See page 172. POR:
1
0
0
0
0
0
0
0
$FE02
Read:
R
R
R
R
R
R
R
R
Reserved Write:
Reset: 0
0
0
0
0
0
0
0
SIM Break Flag Control Read: BCFE
R
R
R
R
R
R
R
$FE03
Register (SBFCR) Write:
See page 220. Reset:
0
0
0
0
0
0
0
0
Interrupt Status Register 1 Read: IF6
IF5
IF4
IF3
IF2
IF1
0
0
$FE04
(INT1) Write: R
R
R
R
R
R
R
R
See page 167. Reset:
0
0
0
0
0
0
0
0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 7)
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Freescale Semiconductor
35