MC68HC908GR8A_07 Datasheet, PDF (190/260 Pages) Freescale Semiconductor, Inc – Microcontrollers

Serial Peripheral Interface (SPI) Module
When enabled, the SPI controls data direction of the SPSCK pin regardless of the state of the data
direction register of the shared I/O port.
15.11.4 SS (Slave Select)
The SS pin has various functions depending on the current state of the SPI. For an SPI configured as a
slave, SS is used to select a slave. For CPHA = 0, SS is used to define the start of a transmission. (See
15.4 Transmission Formats.) Since it is used to indicate the start of a transmission, SS must be toggled
high and low between each byte transmitted for the CPHA = 0 format. However, it can remain low
between transmissions for the CPHA = 1 format. See Figure 15-13.
MISO/MOSI
BYTE 1
BYTE 2
BYTE 3
MASTER SS
SLAVE SS
CPHA = 0
SLAVE SS
CPHA = 1
Figure 15-13. CPHA/SS Timing
When an SPI is configured as a slave, the SS pin is always configured as an input. It cannot be used as
a general-purpose I/O regardless of the state of the MODFEN control bit. However, the MODFEN bit can
still prevent the state of SS from creating a MODF error. See 15.12.2 SPI Status and Control Register.
NOTE
A high on the SS pin of a slave SPI puts the MISO pin in a high-impedance
state. The slave SPI ignores all incoming SPSCK clocks, even if it was
already in the middle of a transmission.
When an SPI is configured as a master, the SS input can be used in conjunction with the MODF flag to
prevent multiple masters from driving MOSI and SPSCK. (See 15.6.2 Mode Fault Error.) For the state of
the SS pin to set the MODF flag, the MODFEN bit in the SPSCK register must be set. If MODFEN is 0 for
an SPI master, the SS pin can be used as a general-purpose I/O under the control of the data direction
register of the shared I/O port. When MODFEN is 1, SS is an input-only pin to the SPI regardless of the
state of the data direction register of the shared I/O port.
The CPU can always read the state of the SS pin by configuring the appropriate pin as an input and
reading the port data register. See Table 15-2.
SPE SPMSTR
0
X⁽¹⁾⁾
1
0
1
1
1
1
1. X = Don’t care
Table 15-2. SPI Configuration
MODFEN
SPI Configuration
Function of SS Pin
X
Not enabled
General-purpose I/O;
SS ignored by SPI
X
Slave
Input-only to SPI
0
Master without MODF
General-purpose I/O;
SS ignored by SPI
1
Master with MODF
Input-only to SPI
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
190
Freescale Semiconductor