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MC68HC908GR8A_07 Datasheet, PDF (49/260 Pages) Freescale Semiconductor, Inc – Microcontrollers
INTERNAL DATA BUS
READ DDRBx
WRITE DDRBx
RESET
WRITE PTBx
READ PTBx
DDRBx
PTBx
Functional Description
DISABLE
PTBx
ADC CHANNEL x
INTERRUPT
LOGIC
CONVERSION
COMPLETE
AIEN COCO
CGMXCLK
BUS CLOCK
DISABLE
ADC DATA REGISTER
ADC
ADC
VOLTAGE IN
(VADIN)
VREFH
VREFL
CHANNEL
SELECT
ADCH4–ADCH0
ADC CLOCK
CLOCK
GENERATOR
ADIV2–ADIV0
ADICLK
Figure 3-2. ADC Block Diagram
3.3.2 Voltage Conversion
When the input voltage to the ADC equals VREFH, the ADC converts the signal to $FF (full scale). If the
input voltage equals VREFL, the ADC converts it to $00. Input voltages between VREFH and VREFL are a
straight-line linear conversion.
NOTE
The ADC input voltage must always be greater than VSSA and less than
VDDA. VREFH must always be greater than or equal to VREFL.
NOTE
Connect the VDDA pin to the same voltage potential as the VDD pin, and
connect the VSSA pin to the same voltage potential as the VSS pin. The
VDDA pin should be routed carefully for maximum noise immunity.
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Freescale Semiconductor
49