MC68HC000RC12 Datasheet, PDF (63/189 Pages) Freescale Semiconductor, Inc – 8-/16-/32-Bit Microprocessors User’s Manual

Freescale Semiconductor, Inc.
RA
RA ¹
GT
XA1
RA
GT
RA
XX
XA
GT
RA
RA
RA
RA
R+A
GT
GT
RX
RA
RA
GT
GT
XX
RA
(a) 3-Wire Bus Arbitration
R
R
GT
STATE 0
R
GT
STATE 1
R
GT
STATE 4
X
GT
STATE 2
GT
X
STATE 3
R
(b) 2-Wire Bus Arbitration
R
R = Bus Request Internal
A = Bus Grant Acknowledge Internal
G = Bus Grant
T = Three-state Control to Bus Control Logic
X = Don't Care
Notes:
1. State machine will not change if
the bus is S0 or S1. Refer to
BUS ARBITRATION CONTROL. 5.2.3.
2. The address bus will be placed in
the high-impedance state if T is
asserted and AS is negated.
Figure 5-18. Bus Arbitration Unit State Diagrams
Figures 5-19, 5-20, and 5-21 applies to all processors using 3-wire bus arbitration. Figures
5-22, 5-23, and 5-24 applies to all processors using 2-wire bus arbitration.
MOTOROLA
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
5-17
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