MC68HC000RC12 Datasheet, PDF (109/189 Pages) Freescale Semiconductor, Inc – 8-/16-/32-Bit Microprocessors User’s Manual

Freescale Semiconductor, Inc.
In Table 7-5, the following notation applies:
An — Address register operand
Dn — Data register operand
ea — An operand specified by an effective address
M — Memory effective address operand
Table 7-5. Standard Instruction Execution Times
Instruction
Size
op<ea>, An
op<ea>, Dn
op Dn, <M>
ADD/ADDA
Byte
Word
Long
—
12(2/0)+
10(2/0)+**
8(2/0)+
8(2/0)+
10(2/0)+**
12(2/1)+
16(2/2)+
24(2/4)+
AND
Byte
Word
Long
—
8(2/0)+
12(2/1)+
—
8(2/0)+
16(2/2)+
—
10(2/0)+**
24(2/4)+
CMP/CMPA
Byte
—
8(2/0)+
—
Word
10(2/0)+
8(2/0)+
—
Long
10(2/0)+
10(2/0)+
—
DIVS
DIVU
—
—
162(2/0)+*
—
—
—
144(2/0)+*
—
EOR
Byte,
Word,
Long
—
8(2/0)+***
12(2/1)+
—
8(2/0)+***
16(2/2)+
—
12(2/0)+***
24(2/4)+
MULS
MULU
—
—
74(2/0)+*
—
—
—
74(2/0)+*
—
OR
Byte,
—
8(2/0)+
12(2/1)+
Word
—
8(2/0)+
16(2/2)+
Long
—
10(2/0)+**
24(2/4)+
SUB
Byte,
8(2/0)+
12(2/1)+
Word
12(2/0)+
8(2/0)+
16(2/2)+
Long
10(2/0)+**
10(2/0)+**
24(2/4)+
+ Add effective address calculation time.
* Indicates maximum base value added to word effective address time
** The base time of 10 clock periods is increased to 12 if the effective address mode is
register direct or immediate (effective address time should also be added).
*** Only available effective address mode is data register direct.
DIVS, DIVU — The divide algorithm used by the MC68008 provides less than 10% difference
between the best- and worst-case timings.
MULS, MULU — The multiply algorithm requires 42+2n clocks where n is defined as:
MULS: n = tag the <ea> with a zero as the MSB; n is the resultant number of 10
or 01 patterns in the 17-bit source; i.e., worst case happens when the source
is $5555.
MULU: n = the number of ones in the <ea>
7.4 IMMEDIATE INSTRUCTION EXECUTION TIMES
The numbers of clock periods shown in Table 7-6 include the times to fetch immediate
operands, perform the operations, store the results, and read the next operation. The total
number of clock periods, the number of read cycles, and the number of write cycles are
7-4
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
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